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S12SPIV2D Datasheet(PDF) 53 Page - Freescale Semiconductor, Inc |
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S12SPIV2D Datasheet(HTML) 53 Page - Freescale Semiconductor, Inc |
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53 / 126 page  MC9S12DJ64 Device User Guide — V01.17 53 PJ7 KWJ7 SCL TXCAN0 VDDX PERJ/ PPSJ Up Port J I/O, Interrupt, SCL of IIC, TX of CAN0 PJ6 KWJ6 SDA RXCAN0 Port J I/O, Interrupt, SDA of IIC, RX of CAN0 PJ[1:0] KWJ[1:0] — — Port J I/O, Interrupts PK7 ECS ROMCTL — VDDX PUCR/ PUPKE Up Port K I/O, Emulation Chip Select, ROM On Enable PK[5:0] XADDR[19:14] — — Port K I/O, Extended Addresses PM7 — — — PERM/ PPSM Disabled Port M I/O PM6 — — — Port M I/O PM5 TXCAN0 SCK — Port M I/O, TX of CAN0, SCK of SPI0 PM4 RXCAN0 MOSI — Port M I/O, RX of CAN0, MOSI of SPI0 PM3 TXCAN0 SS0 — Port M I/O, TX of CAN0, SS of SPI0 PM2 RXCAN0 MISO0 — Port M I/O, RX of CAN0, MISO of SPI0 PM1 TXCAN0 TXB — Port M I/O, TX of CAN0, RX of BDLC PM0 RXCAN0 RXB — Port M I/O, RX of CAN0, RX of BDLC PP7 KWP7 PWM7 — PERP/ PPSP Port P I/O, Interrupt, Channel 7 of PWM PP6 KWP6 PWM6 — Port P I/O, Interrupt, PWM Channel 6 PP5 KWP5 PWM5 — Port P I/O, Interrupt, PWM Channel 5 PP4 KWP4 PWM4 — Port P I/O, Interrupt, PWM Channel 4 PP3 KWP3 PWM3 — Port P I/O, Interrupt, PWM Channel 3 PP2 KWP2 PWM2 — Port P I/O, Interrupt, PWM Channel 2 PP1 KWP1 PWM1 — Port P I/O, Interrupt, PWM Channel 1 PP0 KWP0 PWM0 — Port P I/O, Interrupt, PWM Channel 0 PS7 SS0 — — PERS/ PPSS Up Port S I/O, SS of SPI0 PS6 SCK0 — — Port S I/O, SCK of SPI0 PS5 MOSI0 — — Port S I/O, MOSI of SPI0 PS4 MISO0 — — Port S I/O, MISO of SPI0 PS3 TXD1 — — Port S I/O, TXD of SCI1 PS2 RXD1 — — Port S I/O, RXD of SCI1 PS1 TXD0 — — Port S I/O, TXD of SCI0 PS0 RXD0 — — Port S I/O, RXD of SCI0 PT[7:0] IOC[7:0] — — PERT/ PPST Disabled Port T I/O, Timer channels NOTES: 1. Refer to PEAR register description in HCS12 Multiplexed External Bus Interface (MEBI) Block Guide Pin Name Function1 Pin Name Function2 Pin Name Function3 Pin Name Function4 Powered by Internal Pull Resistor Description CTRL Reset State |
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