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LPC81XM Datasheet(PDF) 16 Page - NXP Semiconductors

Part # LPC81XM
Description  32-bit ARM Cortex-M0 microcontroller; up to 16 kB flash and 4 kB SRAM
PDF  71 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

LPC81XM Datasheet(HTML) 16 Page - NXP Semiconductors

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LPC81xM
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 3 — 29 July 2013
16 of 71
NXP Semiconductors
LPC81xM
32-bit ARM Cortex-M0+ microcontroller
8.9 Switch Matrix (SWM)
The switch matrix controls the function of each digital or mixed analog/digital pin in a
highly flexible way by allowing to connect many functions like the USART, SPI, SCT, and
I2C functions to any pin that is not power or ground. These functions are called movable
functions and are listed in Table 5.
Functions that need specialized pads like the oscillator pins XTALIN and XTALOUT can
be enabled or disabled through the switch matrix. These functions are called fixed-pin
functions and cannot move to other pins. The fixed-pin functions are listed in Table 4. If a
fixed-pin function is disabled, any other movable function can be assigned to this pin.
8.10 Fast General-Purpose parallel I/O (GPIO)
Device pins that are not connected to a specific peripheral function are controlled by the
GPIO registers. Pins may be dynamically configured as inputs or outputs. Multiple outputs
can be set or cleared in one write operation.
LPC81xM use accelerated GPIO functions:
• GPIO registers are located on the ARM Cortex M0+ IO bus for fastest possible
single-cycle I/O timing, allowing GPIO toggling with rates of up to 15 MHz.
Fig 7.
Standard I/O pad configuration



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