PIC18F1220ESLASHSSSQTP datasheet(26/308 Pages) MICROCHIP

26 / 308 page

PIC18F1220/1320

DS39605F-page 24

3.3.2

SEC_IDLE MODE

In SEC_IDLE mode, the CPU is disabled, but the

peripherals continue to be clocked from the Timer1

oscillator. This mode is entered by setting the Idle bit,

modifying bits, SCS1:SCS0 = 01 and executing a

SLEEP

instruction. When the clock source is switched

(see Figure 3-5) to the Timer1 oscillator, the primary

oscillator is shut down, the OSTS bit is cleared and the

T1RUN bit is set.

When a wake event occurs, the peripherals continue to

be clocked from the Timer1 oscillator. After a 10

μs

delay following the wake event, the CPU begins exe-

cuting code, being clocked by the Timer1 oscillator. The

microcontroller operates in SEC_RUN mode until the

primary clock becomes ready. When the primary clock

becomes ready, a clock switchback to the primary clock

occurs (see Figure 3-6). When the clock switch is com-

plete, the T1RUN bit is cleared, the OSTS bit is set and

the primary clock is providing the system clock. The

IDLEN and SCS bits are not affected by the wake-up.

The Timer1 oscillator continues to run.

FIGURE 3-5:

TIMING TRANSITION FOR ENTRY TO SEC_IDLE MODE

FIGURE 3-6:

TIMING TRANSITION FOR WAKE FROM SEC_RUN MODE (HSPLL)

Note:

The Timer1 oscillator should already be

running prior to entering SEC_IDLE mode.

If the T1OSCEN bit is not set when the

SLEEP

instruction is executed, the SLEEP

instruction will be ignored and entry to

SEC_IDLE mode will not occur. If the

Timer1 oscillator is enabled, but not yet

running, peripheral clocks will be delayed

until the oscillator has started; in such sit-

uations, initial oscillator operation is far

from stable and unpredictable operation

may result.

OSC1

Peripheral

Program

T1OSI

Counter

Clock

CPU

Clock

PC + 2

123

4567

Clock Transition

Q3 Q4

OSC1

Peripheral

Program

PC + 2

T1OSI

PLL Clock

PC + 6

Output

CPU Clock

PC + 4

Clock

Counter

Note 1:

TOST = 1024 TOSC; TPLL = 2 ms (approx). These intervals are not shown to scale.

Wake from Interrupt Event

TPLL(1)

Clock Transition

OSTS bit Set

TOST(1)

PIC18F1220E/SSSQTP Datasheet(PDF) 26 Page - Microchip Technology

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