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AD9920ABBCZ Datasheet(PDF) 43 Page - Analog Devices

Part # AD9920ABBCZ
Description  12-Bit CCD Signal Processor with V-Driver and Precision Timing Generator
PDF  112 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9920ABBCZ Datasheet(HTML) 43 Page - Analog Devices

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AD9920A
Rev. B | Page 43 of 112
Special Pattern Insertion
Additional flexibility is available using the SPC_PAT_EN
register bits, which allow a Group B, Group C, or Group D
pattern to be inserted into a series of Group A repetitions. This
feature is useful when a different pattern is needed at the start,
middle, or end of a sequence.
Figure 54 shows an example of a sweep region using VPATA
with multiple repetitions where a single repetition of VPATB
has been added into the middle of the sequence. Figure 55
shows more detail on how to set the registers to achieve the
desired timing.
Note that VREPB is used to specify which repetition number
has the special pattern inserted instead of VPATA. VPATB
always has priority over VPATC or VPATD if more than one
SPC_PAT_EN bit is enabled (that is, SPC_PAT_EN, Bit 0 has
priority over SPC_PAT_EN, Bit 1 and Bit 2).
VD
XV1 TO XVx
HD
REGION 1: SWEEP REGION
LINE 0
LINE 1
REGION 0
REGION 2
LINE 24
LINE 25
LINE 2
SCP1
SCP2
PATTERN B INSERTED DURING PATTERN A REPETITIONS
Figure 54. Special Pattern Insertion Example
XV1
HD
V-PATTERN A
V-PATTERN B
V-PATTERN A
REP 1
REP 2
REP N
REP 5
REP 4
REP 3
REGISTER SETTINGS:
DESCRIPTION:
SPC_PAT_EN[0] = 1
V-PATTERN B IS USED AS SPECIAL PATTERN
VREPA = N
TOTAL NUMBER OF REPS USED FOR SEQUENCE (N REPS)
VREPB = 4
REP 4 USES V-PATTERN B INSTEAD OF V-PATTERN A
NOTES
1. VSTARTB MUST BE SET EQUAL TO VSTARTA.
Figure 55. Special Pattern Insertion Registers



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