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DSPIC33FJ12GP201TE/ML Datasheet(PDF) 238 Page - Microchip Technology |
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DSPIC33FJ12GP201TE/ML Datasheet(HTML) 238 Page - Microchip Technology |
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238 / 242 page ![]() dsPIC33FJ12GP201/202 DS70264B-page 236 Preliminary © 2007 Microchip Technology Inc. SPIx Slave Mode (CKE = 0) Requirements .............. 212 SPIx Slave Mode (CKE = 1) Requirements .............. 214 Timer1 External Clock Requirements ....................... 206 Timer2 External Clock Requirements ....................... 207 Timer3 External Clock Requirements ....................... 207 U UART Baud Rate Generator (BRG)............................................... 154 Break and Sync Transmit Sequence ........................ 155 Flow Control Using UxCTS and UxRTS Pins............ 155 Receiving in 8-bit or 9-bit Data Mode........................ 155 Transmitting in 8-bit Data Mode................................ 155 Transmitting in 9-bit Data Mode................................ 155 UART Module UART1 Register Map.................................................. 32 V Voltage Regulator (On-Chip)............................................. 176 W Watchdog Timer (WDT) ............................................ 173, 177 Programming Considerations ................................... 177 WWW Address.................................................................. 237 WWW, On-Line Support........................................................ 6 |
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