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DSPIC30F2011AT-30E/PF Datasheet(PDF) 198 Page - Microchip Technology |
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DSPIC30F2011AT-30E/PF Datasheet(HTML) 198 Page - Microchip Technology |
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198 / 228 page ![]() dsPIC30F6011/6012/6013/6014 DS70117F-page 196 © 2006 Microchip Technology Inc. FIGURE 23-14: SPI MODULE MASTER MODE (CKE = 0) TIMING CHARACTERISTICS CS78 TFACL Fall Time, SYNC, SDATA_OUT — TBD TBD ns CLOAD = 50 pF, VDD = 3V CS80 TOVDACL Output valid delay from rising edge of BIT_CLK —— 15 ns — TABLE 23-31: SPI MASTER MODE (CKE = 0) TIMING REQUIREMENTS AC CHARACTERISTICS Standard Operating Conditions: 2.5V to 5.5V (unless otherwise stated) Operating temperature -40°C ≤ TA ≤ +85°C for Industrial -40°C ≤ TA ≤ +125°C for Extended Param No. Symbol Characteristic(1) Min Typ(2) Max Units Conditions SP10 TscL SCKX Output Low Time(3) TCY / 2 — — ns — SP11 TscH SCKX Output High Time(3) TCY/2 — — ns — Note 1: These parameters are characterized but not tested in manufacturing. 2: Data in “Typ” column is at 5V, 25°C unless otherwise stated. Parameters are for design guidance only and are not tested. 3: The minimum clock period for SCK is 100 ns. Therefore, the clock generated in Master mode must not violate this specification. 4: Assumes 50 pF load on all SPI pins. TABLE 23-30: DCI MODULE (AC-LINK MODE) TIMING REQUIREMENTS AC CHARACTERISTICS Standard Operating Conditions: 2.5V to 5.5V (unless otherwise stated) Operating temperature -40°C ≤ TA ≤ +85°C for Industrial -40°C ≤ TA ≤ +125°C for Extended Param No. Symbol Characteristic(1)(2) Min Typ(3) Max Units Conditions Note 1: These parameters are characterized but not tested in manufacturing. 2: These values assume BIT_CLK frequency is 12.288 MHz. 3: Data in “Typ” column is at 5V, 25°C unless otherwise stated. Parameters are for design guidance only and are not tested. SCKx (CKP = 0) SCKx (CKP = 1) SDOx SDIx SP11 SP10 SP40 SP41 SP21 SP20 SP35 SP20 SP21 MSb LSb BIT14 - - - - - -1 MSb IN LSb IN BIT14 - - - -1 SP30 SP31 Note: Refer to Figure 23-3 for load conditions. |
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