17XSF500 datasheet(21/70 Pages) FREESCALE

21 / 70 page

Analog Integrated Circuit Device Data



Freescale Semiconductor

MC17XSF500

Functional Block Requirements and Behaviors

6.1

Self-protected High Side Switches Description and Application

Information

6.1.1

Features

Up to five power outputs are foreseen to drive light as well as DC motor applications. The outputs are optimized for driving bulbs,

but also HID ballasts, LEDs, and other resistive or low inductive loads.

The smart switches are controlled by use of high sophisticated gate drivers. The gate drivers provide:

•

output pulse shaping

•

output protections

•

active clamps

•

output diagnostics

6.1.2

Output Pulse Shaping

The outputs are controlled with a closed loop active pulse shaping in order to provide the best compromise between:

•

low switching losses

•

low EMC emission performance

•

minimum propagation delay time

Depending on the programming of the prescaler setting register #12-1, #12-2 the switching speeds of the outputs are adjusted

to the output frequency range of each channel.

The edge shaping shall be designed according the following table:

The edge shaping provides full symmetry for rising and falling transition:

•

the slopes for the rising and falling edge are matched to provide best EMC emission performance

•

the shaping of the upper edges and the lower edges is matched to provide the best EMC emission performance

•

the propagation delay time for the rising edge and the falling edge are matched in order to provide true duty cycle

control of the output duty cycle error < 1 LSB at the max. frequency

•

a digital regulation loop is used to minimize the duty cycle error of the output signal

divider

factor

min

max

min

max

min

max

min

max

100

4252

200

8248

100

400

2,5

8248

PWM freq [Hz]

PWM period [m s]

d.c. range [hex]

d.c. range [LSB]

min. on/off duty

cycle time [µs]

156

17XSF500 Datasheet(PDF) 21 Page - Freescale Semiconductor, Inc

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