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PIC10LF322T-EMCSQTP Datasheet(PDF) 115 Page - Microchip Technology |
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PIC10LF322T-EMCSQTP Datasheet(HTML) 115 Page - Microchip Technology |
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115 / 210 page ![]() 2011 Microchip Technology Inc. Preliminary DS41585A-page 115 PIC10(L)F320/322 19.1.3 LOGIC FUNCTION There are eight available logic functions including: • AND-OR •OR-XOR •AND • S-R Latch • D Flip-Flop with Set and Reset • D Flip-Flop with Reset • J-K Flip-Flop with Reset • Transparent Latch with Set and Reset Logic functions are shown in Figure 19-3. Each logic function has four inputs and one output. The four inputs are the four data gate outputs of the previous stage. The output is fed to the inversion stage and from there to other peripherals, an output pin, and back to the CLCx itself. 19.1.4 OUTPUT POLARITY The last stage in the configurable logic cell is the output polarity. Setting the LCxPOL bit of the CLCxCON reg- ister inverts the output signal from the logic stage. Changing the polarity while the interrupts are enabled will cause an interrupt for the resulting output transition. 19.1.5 CLCX SETUP STEPS The following steps should be followed when setting up the CLCx: • Disable CLCx by clearing the LCxEN bit. • Select desired inputs using CLCxSEL0 and CLCxSEL1 registers (See Table 19-1). • Clear any associated ANSEL bits. • Set all TRIS bits associated with inputs. • Clear all TRIS bits associated with outputs. • Enable the chosen inputs through the four gates using CLCxGLS0, CLCxGLS1, CLCxGLS2, and CLCxGLS3 registers. • Select the gate output polarities with the LCxPOLy bits of the CLCxPOL register. • Select the desired logic function with the LCxMODE<2:0> bits of the CLCxCON register. • Select the desired polarity of the logic output with the LCxPOL bit of the CLCxPOL register. (This step may be combined with the previous gate out- put polarity step). • If driving the CLCx pin, set the LCxOE bit of the CLCxCON register and also clear the TRIS bit corresponding to that output. • If interrupts are desired, configure the following bits: - Set the LCxINTP bit in the CLCxCON register for rising event. - Set the LCxINTN bit in the CLCxCON register or falling event. - Set the CLCxIE bit of the associated PIE registers. - Set the GIE and PEIE bits of the INTCON register. • Enable the CLCx by setting the LCxEN bit of the CLCxCON register. |
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