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PIC18F4550ESOSQTP Datasheet(PDF) 236 Page - Microchip Technology

Part # PIC18F4550ESOSQTP
Description  28/40/44-Pin, High-Performance, Enhanced Flash, USB Microcontrollers with nanoWatt Technology
PDF  430 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18F4550ESOSQTP Datasheet(HTML) 236 Page - Microchip Technology

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PIC18F2455/2550/4455/4550
DS39632D-page 234
Preliminary
© 2007 Microchip Technology Inc.
19.4.17.2
Bus Collision During a Repeated
Start Condition
During a Repeated Start condition, a bus collision
occurs if:
a)
A low level is sampled on SDA when SCL goes
from low level to high level.
b)
SCL goes low before SDA is asserted low,
indicating that another master is attempting to
transmit a data ‘1’.
When the user deasserts SDA and the pin is allowed to
float high, the BRG is loaded with SSPADD<6:0> and
counts down to ‘0’. The SCL pin is then deasserted and
when sampled high, the SDA pin is sampled.
If SDA is low, a bus collision has occurred (i.e., another
master is attempting to transmit a data ‘0’, see
Figure 19-31). If SDA is sampled high, the BRG is
reloaded and begins counting. If SDA goes from high-to-
low before the BRG times out, no bus collision occurs
because no two masters can assert SDA at exactly the
same time.
If SCL goes from high-to-low before the BRG times out
and SDA has not already been asserted, a bus collision
occurs. In this case, another master is attempting to
transmit a data ‘1’ during the Repeated Start condition
(see Figure 19-32).
If, at the end of the BRG time-out, both SCL and SDA
are still high, the SDA pin is driven low and the BRG is
reloaded and begins counting. At the end of the count,
regardless of the status of the SCL pin, the SCL pin is
driven low and the Repeated Start condition is
complete.
FIGURE 19-31:
BUS COLLISION DURING A REPEATED START CONDITION (CASE 1)
FIGURE 19-32:
BUS COLLISION DURING REPEATED START CONDITION (CASE 2)
SDA
SCL
RSEN
BCLIF
S
SSPIF
Sample SDA when SCL goes high.
If SDA = 0, set BCLIF and release SDA and SCL.
Cleared in software
‘0’
‘0’
SDA
SCL
BCLIF
RSEN
S
SSPIF
Interrupt cleared
in software
SCL goes low before SDA,
set BCLIF. Release SDA and SCL.
TBRG
TBRG
‘0’



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