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PIC18F4550ESOSQTP Datasheet(PDF) 100 Page - Microchip Technology |
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PIC18F4550ESOSQTP Datasheet(HTML) 100 Page - Microchip Technology |
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100 / 430 page  PIC18F2455/2550/4455/4550 DS39632D-page 98 Preliminary © 2007 Microchip Technology Inc. FIGURE 9-1: INTERRUPT LOGIC TMR0IE GIE/GIEH PEIE/GIEL Wake-up if in Sleep Mode Interrupt to CPU Vector to Location 0008h INT2IF INT2IE INT2IP INT1IF INT1IE INT1IP TMR0IF TMR0IE TMR0IP RBIF RBIE RBIP IPEN TMR0IF TMR0IP INT1IF INT1IE INT1IP INT2IF INT2IE INT2IP RBIF RBIE RBIP INT0IF INT0IE PEIE/GIEL Interrupt to CPU Vector to Location IPEN IPEN 0018h Peripheral Interrupt Flag bit Peripheral Interrupt Enable bit Peripheral Interrupt Priority bit Peripheral Interrupt Flag bit Peripheral Interrupt Enable bit Peripheral Interrupt Priority bit TMR1IF TMR1IE TMR1IP USBIF USBIE USBIP Additional Peripheral Interrupts TMR1IF TMR1IE TMR1IP High Priority Interrupt Generation Low Priority Interrupt Generation USBIF USBIE USBIP Additional Peripheral Interrupts GIE/GIEH From USB Interrupt Logic From USB Interrupt Logic |
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