PIC18F4550ESOSQTP datasheet(177/430 Pages) MICROCHIP

177 / 430 page

Preliminary

DS39632D-page 175

PIC18F2455/2550/4455/4550

17.4.4

PING-PONG BUFFERING

An endpoint is defined to have a ping-pong buffer when

it has two sets of BD entries: one set for an Even

transfer and one set for an Odd transfer. This allows the

CPU to process one BD while the SIE is processing the

other BD. Double-buffering BDs in this way allows for

maximum throughput to/from the USB.

The USB module supports four modes of operation:

• No ping-pong support

• Ping-pong buffer support for OUT Endpoint 0 only

• Ping-pong buffer support for all endpoints

• Ping-pong buffer support for all other Endpoints

except Endpoint 0

The ping-pong buffer settings are configured using the

PPB1:PPB0 bits in the UCFG register.

The USB module keeps track of the Ping-Pong Pointer

individually for each endpoint. All pointers are initially

reset to the Even BD when the module is enabled. After

the completion of a transaction (UOWN cleared by the

SIE), the pointer is toggled to the Odd BD. After the

completion of the next transaction, the pointer is

toggled back to the Even BD and so on.

The Even/Odd status of the last transaction is stored in

the PPBI bit of the USTAT register. The user can reset

all Ping-Pong Pointers to Even using the PPBRST bit.

Figure 17-7 shows the four different

modes of

operation and how USB RAM is filled with the BDs.

BDs have a fixed relationship to a particular endpoint,

depending on the buffering configuration. The mapping

of BDs to endpoints is detailed in Table 17-4. This

relationship also means that gaps may occur in the

BDT if endpoints are not enabled contiguously. This

theoretically means that the BDs for disabled endpoints

could be used as buffer space. In practice, users

should avoid using such spaces in the BDT unless a

method of validating BD addresses is implemented.

FIGURE 17-7:

BUFFER DESCRIPTOR TABLE MAPPING FOR BUFFERING MODES

EP1 IN Even

EP1 OUT Even

EP1 OUT Odd

EP1 IN Odd

Descriptor

EP1 IN

EP15 IN

EP1 OUT

EP0 OUT

PPB1:PPB0 = 00

EP0 IN

EP1 IN

No Ping-Pong

EP15 IN

EP0 IN

EP0 OUT Even

PPB1:PPB0 = 01

EP0 OUT Odd

EP1 OUT

Ping-Pong Buffer

EP15 IN Odd

EP0 IN Even

EP0 OUT Even

PPB1:PPB0 = 10

EP0 OUT Odd

EP0 IN Odd

Ping-Pong Buffers

Descriptor

400h

4FFh

400h

47Fh

483h

Available

Data RAM

Available

Data RAM

Maximum Memory

Used: 128 bytes

Maximum BDs:

32 (BD0 to BD31)

Maximum Memory

Used: 132 bytes

Maximum BDs:

33 (BD0 to BD32)

Maximum Memory

Used: 256 bytes

Maximum BDs: 6

4 (BD0 to BD63)

Note:

Memory area not shown to scale.

Descriptor

Buffers

on EP0 OUT

on all EPs

EP1 IN Even

EP1 OUT Even

EP1 OUT Odd

EP1 IN Odd

Descriptor

EP15 IN Odd

EP0 OUT

PPB1:PPB0 = 11

EP0 IN

Ping-Pong Buffers

Descriptor

4FFh

400h

Maximum Memory

Used: 248 bytes

Maximum BDs:

62 (BD0 to BD61)

on all other EPs

except EP0

Available

Data RAM

4F7h

PIC18F4550ESOSQTP Datasheet(PDF) 177 Page - Microchip Technology

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