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PIC18F4550ESOSQTP Datasheet(PDF) 195 Page - Microchip Technology |
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PIC18F4550ESOSQTP Datasheet(HTML) 195 Page - Microchip Technology |
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195 / 430 page ![]() © 2007 Microchip Technology Inc. Preliminary DS39632D-page 193 PIC18F2455/2550/4455/4550 19.0 MASTER SYNCHRONOUS SERIAL PORT (MSSP) MODULE 19.1 Master SSP (MSSP) Module Overview The Master Synchronous Serial Port (MSSP) module is a serial interface, useful for communicating with other peripheral or microcontroller devices. These peripheral devices may be serial EEPROMs, shift registers, display drivers, A/D converters, etc. The MSSP module can operate in one of two modes: • Serial Peripheral Interface (SPI) • Inter-Integrated Circuit (I2C™) - Full Master mode - Slave mode (with general address call) The I2C interface supports the following modes in hardware: •Master mode • Multi-Master mode • Slave mode 19.2 Control Registers The MSSP module has three associated control regis- ters. These include a status register (SSPSTAT) and two control registers (SSPCON1 and SSPCON2). The use of these registers and their individual Configuration bits differ significantly depending on whether the MSSP module is operated in SPI or I2C mode. Additional details are provided under the individual sections. 19.3 SPI Mode The SPI mode allows 8 bits of data to be synchronously transmitted and received simultaneously. All four modes of the SPI are supported. To accomplish communication, typically three pins are used: • Serial Data Out (SDO) – RC7/RX/DT/SDO • Serial Data In (SDI) – RB0/AN12/INT0/FLT0/SDI/SDA • Serial Clock (SCK) – RB1/AN10/INT1/SCK/SCL Additionally, a fourth pin may be used when in a Slave mode of operation: • Slave Select (SS) – RA5/AN4/SS/HLVDIN/C2OUT Figure 19-1 shows the block diagram of the MSSP module when operating in SPI mode. FIGURE 19-1: MSSP BLOCK DIAGRAM (SPI MODE) ( ) Read Write Internal Data Bus SSPSR reg SSPM3:SSPM0 bit0 Shift Clock SS Control Enable Edge Select Clock Select TMR2 Output TOSC Prescaler 4, 16, 64 2 Edge Select 2 4 Data to TX/RX in SSPSR TRIS bit 2 SMP:CKE SDO SSPBUF reg SDI SS SCK Note: Only those pin functions relevant to SPI operation are shown here. |
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