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DS30EA101SQ/NOPB Datasheet(PDF) 4 Page - Texas Instruments |
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DS30EA101SQ/NOPB Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 12 page ![]() 20% 80% VOD- VOD+ VOS VSS = (VOD+) ± (VOD-) 0V differential tTLH + VOD 20% 80% tTHL VSS - VOD DS30EA101 SNLS404A – FEBRUARY 2012 – REVISED APRIL 2013 www.ti.com AC Electrical Characteristics Over recommended supply voltage and operating temperature ranges, unless otherwise specified. (1) (2) Parameter Test Conditions Reference Min Typ Max Units DRIN Input Data Rate IN+, IN- 150 3125 Mbps tJIT Total Jitter at BER 10-12 (3) 3.125 Gbps, UI 0.35 0-10 meters CAT6 2.5 Gbps, UI 0.35 0-25 meters CAT6 1.5 Gbps, UI 0.35 0-50 meters CAT6 3.125 Gbps, UI 0.3 0-100 meters RG59 2.5 Gbps, UI 0.35 0-110 meters RG59 1.5 Gbps, UI 0.2 0-120 meters RG59 tTLH Transition Time Low to High 20% - 80%, 100 Ω load, (4), OUT+, OUT- 90 130 ps Figure 2 tTHL Transition Time High to Low 90 130 ps (1) The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not ensured. (2) Typical values represent most likely parametric norms at VCC = +2.5V, TA = +25°C, and at the Recommended Operating Conditions at the time of product characterization and are not ensured. (3) The total jitter at BER 10-12 is calculated as DJ + (14 x RJ), where DJ is deterministic jitter and RJ is random jitter. The jitter is expressed as a portion of the unit interval (UI). The UI is the reciprocal of the data rate. (4) Specification is ensured by characterization and is not tested in production. TIMING DIAGRAMS Figure 2. LVDS Output Voltage, Offset, and Timing Parameters 4 Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: DS30EA101 |
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