DSPIC30F1010 datasheet(80/286 Pages) MICROCHIP

80 / 286 page

dsPIC30F1010/202X

DS70178C-page 78

Preliminary

6.2

Configuring Analog Port Pins

The use of the ADPCFG and TRIS registers control the

operation of the A/D port pins. The port pins that are

desired as analog inputs must have their correspond-

ing TRIS bit set (input). If the TRIS bit is cleared

(output), the digital output level (VOH or VOL) will be

converted.

When reading the PORT register, all pins configured as

analog input channel will read as cleared (a low level).

Pins configured as digital inputs will not convert an ana-

log input. Analog levels on any pin that is defined as a

digital input (including the ANx pins), may cause the

input buffer to consume current that exceeds the

device specifications.

6.2.1

I/O PORT WRITE/READ TIMING

One instruction cycle is required between a port

direction change or port write operation and a read

operation of the same port. Typically this instruction

would be a NOP.

EXAMPLE 6-1:

PORT WRITE/READ

EXAMPLE

6.3

Input Change Notification

The input change notification function of the I/O ports

allows the dsPIC30F1010/202X devices to generate

interrupt requests to the processor in response to a

change-of-state on selected input pins. This feature is

capable of detecting input change-of-states even in

Sleep mode, when the clocks are disabled. There are

8 external signals (CN0 through CN7) that can be

selected (enabled) for generating an interrupt request

on a change-of-state.

There are two control registers associated with the CN

module. The CNEN1 register contain the CN interrupt

enable (CNxIE) control bits for each of the CN input

pins. Setting any of these bits enables a CN interrupt

for the corresponding pins.

Each CN pin also has a weak pull-up connected to it.

The pull-ups act as a current source that is connected

to the pin and eliminate the need for external resistors

when push button or keypad devices are connected.

The pull-ups are enabled separately using the CNPU1

PUE) bits for each of the CN pins. Setting any of the

control bits enables the weak pull-ups for the

corresponding pins.

MOV 0xFF00, W0; Configure PORTB<15:8>

; as inputs

MOV W0, TRISBB; and PORTB<7:0> as outputs

NOP

; Delay 1 cycle

BTSS PORTB, #13; Next Instruction

Note: Pull-ups on change notification pins should

always be disabled whenever the port pin is

configured as a digital output.

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