Electronic Components Datasheet Search
  New Zealand  ▼
ALLDATASHEET.CO.NZ

X  

PICASO-OGM Datasheet(PDF) 7 Page - List of Unclassifed Manufacturers

Part # PICASO-OGM
Description  OEM Graphics Module
PDF  22 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  ETC [List of Unclassifed Manufacturers]
Direct Link  
Logo ETC - List of Unclassifed Manufacturers

PICASO-OGM Datasheet(HTML) 7 Page - List of Unclassifed Manufacturers

Back Button PICASO-OGM Datasheet HTML 3Page - List of Unclassifed Manufacturers PICASO-OGM Datasheet HTML 4Page - List of Unclassifed Manufacturers PICASO-OGM Datasheet HTML 5Page - List of Unclassifed Manufacturers PICASO-OGM Datasheet HTML 6Page - List of Unclassifed Manufacturers PICASO-OGM Datasheet HTML 7Page - List of Unclassifed Manufacturers PICASO-OGM Datasheet HTML 8Page - List of Unclassifed Manufacturers PICASO-OGM Datasheet HTML 9Page - List of Unclassifed Manufacturers PICASO-OGM Datasheet HTML 10Page - List of Unclassifed Manufacturers PICASO-OGM Datasheet HTML 11Page - List of Unclassifed Manufacturers Next Button
Zoom Inzoom in Zoom Outzoom out
 7 / 22 page
background image
4D SYSTEMS
PICASO OGM Module
© 2013 4D SYSTEMS
Page 7 of 22
www.4dsystems.com.au
4. Hardware Interface - Pins
The PICASO OGM Module provides both a
hardware and software interface. This section
describes in detail the hardware interface pins of
the device.
Serial Ports - COM0, COM1 UARTS
4.1.
The OGM Module has two dedicated hardware
Asynchronous Serial ports that can communicate
with external serial devices. These are referred to
as the COM0 and the COM1 serial ports.
The primary features are:
•
Full-Duplex 8 bit data transmission and
reception.
•
Data format: 8 bits, No Parity, 1 Stop bit.
•
Independent Baud rates from 300 baud up to
600K baud.
•
Single byte transmits and receives or a fully
buffered service. The buffered service feature
runs in the background capturing and
buffering
serial data
without
the user
application having to constantly poll any of the
serial ports. This frees up the application to
service other tasks.
A single byte serial transmission consists of the
start bit, 8-bits of data followed by the stop bit.
The start bit is always 0, while a stop bit is always
1. The LSB (Least Significant Bit, Bit 0) is sent out
first following the start bit. Figure below shows a
single byte transmission timing diagram.
COM0 is also the primary interface for 4DGL user
program downloads and chip configuration (PmmC
programming).
Once
the
compiled
4DGL
application
program
(EVE
byte-code)
is
downloaded and the user code starts executing,
the serial port is then available to the user
application. Refer to Section 5. ‘Firmware / PmmC
Programming’ for more details on this subject.
TX0 pin (Serial Transmit COM0):
Asynchronous Serial port COM0 transmit pin, TX0.
Connect this pin to external serial device receive
(Rx) signal. This pin is 5.0V tolerant.
RX0 pin (Serial Receive COM0):
Asynchronous Serial port COM0 receive pin, RX0.
Connect this pin to external serial device transmit
(Tx) signal. This pin is 5.0V tolerant.
TX1 pin (Serial Transmit COM1):
Asynchronous Serial port COM1 transmit pin, TX1.
Connect this pin to external serial device receive
(Rx) signal. This pin is 5.0V tolerant.
RX1 pin (Serial Receive COM1):
Asynchronous Serial port COM1 receive pin, RX1.
Connect this pin to external serial device transmit
(Tx) signal. This pin is 5.0V tolerant.
General Purpose I/O
4.2.
There are 13 general purpose Input/Output (GPIO)
pins available to the user. These are grouped as
IO1..IO5 and BUS0..BUS7. Power-Up Reset default
is all INPUTS.
The 5 I/O pins (IO1..IO5), provide flexibility of
individual bit operations while the 8 pins
(BUS0..BUS7),
known
as
GPIO
BUS,
serve
collectively for byte wise operations. The IO4 and
IO5 also act as strobing signals to control the GPIO
Bus. GPIO Bus can be read or written by strobing a
low pulse (50ns duration or greater) the
IO4/BUS_RD or IO5/BUS_WR for read or write
respectively. For detailed usage refer to the
separate document titled:
“PICASO-4DGL-Internal-Functions.pdf”
IO1-IO5 pins (5 x GPIO pins):
General purpose I/O pins. Each pin can be
individually set for INPUT or an OUTPUT.
IO4/BUS_RD pin (GPIO IO4 or BUS_RD pin):
General Purpose IO4 pin. Also used for BUS_RD
signal to read and latch the data in to the parallel
GPIO BUS0..BUS7.
IO5/BUS_WR pin (GPIO IO5 or BUS_WR pin):
General Purpose IO5 pin. Also used for BUS_WR
signal to write and latch the data to the parallel
GPIO BUS0..BUS7.
BUS0-BUS7 pins (GPIO 8-Bit Bus):
8-bit parallel General purpose I/O Bus.
Note: All GPIO pins are 5.0V tolerant.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com