FT313HQ-R datasheet(21/67 Pages) ETC2

21 / 67 page

Document No.: FT_000589

FT313H USB2.0 HS Host Controller Datasheet Version 1.2

Clearance No.: FTDI# 318

Address

Reset value

Description

A4h

HCINTEN

0000h

Host controller interrupt enable register

USB testing register

50h

TESTMODE

0000 0000h

Test mode register

70h

TESTPMSET1

0000 0000h

Test parameter setting 1 register

74h

TESTPMSET2

0000 0000h

Test parameter setting 2 register

Table 5-1 Overview of host controller specific registers

5.2 EHCI operational registers

5.2.1 HCCAPLENGTH register (address = 00h)

This register is used as an offset to add to register base to find the beginning of the operational register

space. The high two bytes contain a BCD encoding of the EHCI revision number supported by this host

controller. The most signification byte of this register represents a major revision and the least

signification byte is the minor revision.

Bit

Name

Type

Default value

Description

[31:16]

HCIVERSION

16’h0100

Host Controller Interface Version Number

This register is a 2-byte register containing a

BCD encoding of the EHCI revision number

supported by the host controller.

[15:8]

Reserved

8’h0

[7:0]

CAPLENGTH

8’h10

Capability Register Length

This register is used as an offset added to

Operational Register Space.

Table 5-2 Capability register

5.2.2 HCSPARAMS register (address = 04h)

This is a set of fields that are structural parameter: number of downstream ports, etc.

Bit

Name

Type

Default value

Description

[31:4]

Reserved

28’h0

[3:0]

N_PORTS

4’h1

Number of Ports

This field specifies the number of the physical

downstream ports implemented on the host

controller.

Table 5-3 Structural parameter register

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