IXFK64N50Q3

IXFX64N50Q3

IXYS Reserves the Right to Change Limits, Test Conditions, and Dimensions.

Fig. 7. Input Admittance

0

10

20

30

40

50

60

70

80

90

100

44.5

55.5

66.5

77.5

88.5

99.5

- 40ºC

25ºC

Fig. 8. Transconductance

0

10

20

30

40

50

60

70

80

0

10

2030

40

50

607080

90

100

125ºC

25ºC

Fig. 9. Forward Voltage Drop of Intrinsic Diode

0

20

40

60

80

100

120

140

160

180

200

0.30.4

0.50.6

0.7

0.8

0.91.0

1.11.2

1.3

Fig. 10. Gate Charge

0

2

4

6

8

10

12

14

16

0

50

100

150

200

Fig. 11. Capacitance

10

100

1,000

10,000

100,000

0

5

10

15

20

25

30

35

40

Ciss

Crss

Coss

Fig. 12. Forward-Bias Safe Operating Area

1

10

100

1000

10

100

1,000

Single Pulse

100µs

1ms

25µs