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HC2509C Datasheet(PDF) 5 Page - Hynix Semiconductor

Part # HC2509C
Description  Phase-Locked Loop Clock Distribution for Synchronous DRAM Applications
PDF  6 Pages
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Manufacturer  HYNIX [Hynix Semiconductor]
Direct Link  http://www.skhynix.com/kor/main.do
Logo HYNIX - Hynix Semiconductor

HC2509C Datasheet(HTML) 5 Page - Hynix Semiconductor

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HC2509C
March 1999
5
Table 6. Switching Characteristics Over Recommended Ranges of Supply
Voltage and Operating Free-air Temperature.(CL=30pF) (see Figure1 and 2) =
Vcc = 3.3V
±0.165V
Vcc =
3.3V
±0.3V
Parameter
From(Input)
TO(Output)
Min
Typ
Max
Min Typ Max
Unit
66MHz < CLKIN
↑<
100MHz
FBIN
-150
-150
ps
tphase error
(normalized)
CLKIN
↑ = 100MHz
FBIN
-50
50
ps
tsk
Any Y of FBOUT
Any Y or
FBOUT
200
ps
Jitter(pk-pk)
CLKIN
> 66MHz
Any Y or
FBOUT
-100
100
ps
Duty Cycle
CLKIN
> 66MHz
Any Y or
FBOUT
45
55
%
tr
Any Y or
FBOUT
1.3
1.9
0.8
2.1
ns
tf
Any Y or
FBOUT
1.7
2.5
1.2
2.7
ns
=These parameters are not production tested.
♣ Phase error does not include jitter.
Figure 1. Load Circuit and Voltage Waveforms
Notes: 1. All input pulses are supplied by generators having
the following characteristics: PRR
≤ 100MHz, Z
o
=50
Ω, t
r =1.2ns, tf=1.2ns
2.The outputs are measured one at a time with one
transition per measurement.
30pF
500§Ù
From Output Under Test
Input
Output
50% V
cc
50% V
cc
3V
0V
VOH
VOL
tpd
0.4V
0.4V
tr
tf
2V
2V
Load Circuit For Outputs
Voltage Waveforms
Propagation Delay Times



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