70353C datasheet(9/76 Pages) MICROCHIP

9 / 76 page

DS70353C-page 21-9

Section 21. Enhanced Controller Area Network (ECAN™)

• CiFMSKSEL1: ECAN Filter 7-0 Mask Selection Register

This register is used with CiFMSKSEL2 to select the Acceptance mask for acceptance

filter 0-7 (see Register 21-8).

• CiFMSKSEL2: ECAN Filter 15-8 Mask Selection Register

This register is used with CiFMSKSEL1 to select the Acceptance mask for acceptance

filter 8-15 (see Register 21-9).

• CiBUFPNT1: ECAN Filter 0-3 Buffer Pointer Register

This register is used to specify the message buffer to be used for storing messages

accepted by acceptance filters 0-3 (see Register 21-10). This register is only accessible by

the user application when the WIN bit is set (CiCTRL1<0> = 1).

• CiBUFPNT2: ECAN Filter 4-7 Buffer Pointer Register

This register is used to specify the message buffer to be used for storing messages

accepted by acceptance filters 4-7 (see Register 21-11). This register is only accessible by

the user application when the WIN bit is set (CiCTRL1<0> = 1).

• CiBUFPNT3: ECAN Filter 8-11 Buffer Pointer Register

This register is used to specify the message buffer to be used for storing messages

accepted by acceptance filters 8-11 (see Register 21-12). This register is only accessible by

the user application when the WIN bit is set (CiCTRL1<0> = 1).

• CiBUFPNT4: ECAN Filter 12-15 Buffer Pointer Register

This register is used to specify the message buffer to be used for storing messages

accepted by acceptance filters 12-15 (see Register 21-13). This register is only accessible

by the user application when the WIN bit is set (CiCTRL1<0> = 1).

21.3.3

ECAN Message Buffer Status Registers

• CiRXFUL1: ECAN Receive Buffer Full Register 1

Paired with CiRXFUL2, this register indicates the buffer full status for message buffers 0-31.

When a received message is stored into a message buffer, the respective buffer full flag is

set (see Register 21-14). This register is only accessible by the user application when the

WIN bit is cleared (CiCTRL1<0> = 0).

• CiRXFUL2: ECAN Receive Buffer Full Register 2

Paired with CiRXFUL1, this register indicates the buffer full status for message buffers 0-31.

When a received message is stored into a message buffer, the respective buffer full flag is

set (see Register 21-15). This register is only accessible by the user application when the

WIN bit is cleared (CiCTRL1<0> = 0).

• CiRXOVF1: ECAN Receive Buffer Overflow Register 1

Paired with CiRXOVF2, this register indicates the overflow status for message buffers 0-31.

When a received message is stored into a message buffer and the respective buffer full flag

is set, the message is lost, and the respective buffer overflow flag is set (see

cleared (CiCTRL1<0> = 0).

• CiRXOVF2: ECAN Receive Buffer Overflow Register 2

Paired with CiRXOVF1, this register indicates the overflow status for message buffers 0-31.

When a received message is stored into a message buffer and the respective buffer full flag

is set, the message is lost, and the respective buffer overflow flag is set (see

cleared (CiCTRL1<0> = 0).

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