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W9812G2KB Datasheet(PDF) 4 Page - Winbond |
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W9812G2KB Datasheet(HTML) 4 Page - Winbond |
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4 / 43 page ![]() W9812G2KB Publication Release Date: Jun. 20, 2014 - 4 - Revision: A01 BLOCK DIAGRAM (DDP) CLK CKE CS CAS, RAS, WE BS0, BS1 A[11:0] VDD VDDQ VSS VSSQ LDQM, UDQM DQ[15:0] 64M (x16) bits SDRAM 1 VDD VDDQ VSS VSSQ DQM0, DMQ1 DQ[15:0] DQM2, DQM3 DQ[31:16] CLK CKE BS0, BS1 A[11:0] CLK CKE BS0, BS1 A[11:0] VDD VDDQ VSS VSSQ LDQM, UDQM DQ[15:0] 64M (x16) bits SDRAM 2 CAS, RAS, WE CS CAS, RAS, WE CS Note: There two same 4M x16 SDRAM chips sealed in this product. The specification in the following pages are for the one chip, the 64M bits SDRAM’ except output slew rate, IDD and ball capacitance. Although each die is tested individually within the dual-die package, some stacked die test results may vary from a like-die tested within a monolithic die package. 3. ORDER INFORMATION PART NUMBER SPEED SELF REFRESH CURRENT (MAX.) OPERATING TEMPERATURE W9812G2KB-6 166MHz/CL3 4mA 0°C ~ 70°C W9812G2KB-6I 166MHz/CL3 4mA -40°C ~ 85°C |
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