AN966 datasheet(13/21 Pages) STMICROELECTRONICS

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Pin 3 (MULT) is the second multiplier input. It will

be connected, through a resistive divider, to the rec-

tified mains to get a sinusoidal voltage reference.

The multiplier can be described by the relationship:

Vcs

= k ⋅ ( VCOMP − 2.5V ) ⋅ V MULT

where VCS (Multiplier output) is the reference for the

current sense, k is the multiplier gain, VCOMP is the

voltage on pin 2 (E/A output) and VMULT is the volt-

age on pin 3.

A complete description is given by the diagram of

fig. 11, which shows the typical multiplier charac-

teristics family. The linear operation of the multiplier

is guaranteed inside the range 0 to 3V of VMULT and

the range 0 to 1.6V of VCS, while the minimum

guaranteed value of the maximum slope of the

characteristics family (

∆VCS/∆VMULT) is 1.65. Taking

this into account, the following is the suggested pro-

cedure to set properly the operating point of the

multiplier.

First, the maximum peak value for VMULT, VMULTpkx, is selected. This value, which will occur at maximum

mains voltage, should be 3V or nearly so in wide range mains and less in case of single mains. The

minimum peak value, occurring at minimum mains voltage will be:

VMULTpkmin

= VMULTpkx ⋅

Virms(min)

Virms(max)

This value, multiplied by the minimum guaranteed

∆VCS

∆VMULT

will give the maximum peak output voltage of

the multiplier:

VXCSpk

= 1.65 ⋅ VMULTpkmin

If the resulting VXCSpk exceeds the linearity limit of the current sense (1.6V), the calculation should be re-

peated beginning with a lower VMULTpkx value.

In this way, the divider will be such that:

+ R2 + R3

VMULTpkx

√2 ⋅ Virms(max)

the individual values can be chosen by setting the current through R3, in the hundreds

µA or less to min-

imise power dissipation.

Pin 4 (CS) is the inverting input of the current sense comparator. Through this pin, the L6561 reads the in-

stantaneous inductor current, converted to a proportional voltage by an external sense resistor (Rs). As this

signal crosses the threshold set by the multiplier output, the PWM latch is reset and the power MOSFET is

turned off. The MOSFET will stay in OFF-state until the PWM latch is set again by the ZCD signal. An inter-

nal circuit ensures that the PWM latch cannot be set until the signal on pin 4 has disappeared.

The sense resistor value is calculated as follows:

≤

VXCSpk

IRspk

where VXCSpk has been calculated as per described earlier and:

IRspk = 2

√2 ⋅ Irms,

VMULT(pin3) (V)

D97IN555A

2.6

3.0

3.2

3.5

5.0

VCOMP(pin2)

(V)

0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

VCS(pin4)

(V)

4.0

2.8

upper voltage

clamp

Figure 11. Multiplier characteristics family

AN966 APPLICATION NOTE

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