AN994 datasheet(4/25 Pages) STMICROELECTRONICS

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L6384E

AN994

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L6384E

The L6384E (depicted in Figure 1) is a half-bridge driver with an externally-adjustable dead

time and shut-down function. To disable the driver, the control pin (DT/SD at pin 3) must be

pulled down to below 0.5 V. The dead time can be set from 0.5 µs to 2.7 µs by placing a

resistor between pin 3 and ground. Available in both Minidip and SO-8 packages, this driver

can be used in motor controls, resonant converters and lighting applications. Figure 2 and

Figure 3 show the schematic diagram of the evaluation circuit and the layout of the test PCB.

Table 1.

L6384E pin description

N. Name Typ.

Function

IN(1)

Logic input. In phase with HVG and in opposition to LVG. Compatible with the VCC voltage.

Supply input voltage. Includes an internal clamp (typically 15.6 V). Also has a UVLO feature

(typical threshold value Vccth1 = 12 V, Vccth2 = 10 V).

DT/SD

High impedance pin with double function. When pulled to a voltage lower than Vdt (typically

0.5 V) the device is shut down. A voltage higher than Vdt sets the dead time between the high

side and low side gate driver. The dead time value can be set by forcing a certain voltage level on

the pin or by connecting a resistor between pin 3 and ground. Care must be taken to avoid spikes

on pin 3 that could cause an undesired shut down of the IC. For this reason, the connection of the

components between pin 3 and ground must be as short as possible. This pin cannot be left

floating for the same reason. The pin must not be pulled through a low impedance to VCC

because of the drop on the current source that feeds Rdt.

GND

Ground.

LVG

Low-side driver output. The output stage can deliver a 400 mA source and a 650 mA sink (typical

values). The circuit guarantees 0.3 V maximum on the pin (at Isink= 10 mA) with VCC > 3 V and

lower than the turn-on threshold. This removes the need for the bleeder resistor connected

between the gate and the source of the external MOSFET normally used to hold the pin low. The

gate driver ensures low impedance in SD conditions as well.

OUT

Upper driver floating reference. Attention should be paid to the layout design of the power stage

so as to limit below-ground spikes on this pin.

7HVG

High-side driver output. The output stage can deliver a 400 mA source and a 650 mA sink (typical

values). The circuit guarantees 0.3 V maximum between this pin and Vout (at Isink = 10 mA) with

VCC > 3 V and lower than the turn-on threshold. This removes the need for the bleeder resistor

connected between the gate and the source of the external MOSFET normally used to hold the

pin low. The gate driver ensures low impedance in SD conditions as well.

8VBOOT

Bootstrap supply voltage. This is the upper driver floating supply. The bootstrap capacitor

connected between this pin and pin 6 can be fed by an internal structure named "bootstrap

driver" (a patented structure). This structure can replace the external bootstrap diode.

The pull-down internal resistor is typically some hundred k

Ωs.

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