DocID8827 Rev 3

9/30

AN1517

Functional description

30

time of the current at turn ON, is a very critical parameter. At a first approach, it appears that

the faster the rise time, the lower the turn ON losses. However, there is a limit introduced by

the recovery time of the recirculation diode.

In fact, when the current of the power element is equal to the inductor current, the diode

turns OFF and the drain of the power is able to go high. But during its recovery time, the

diode can be considered a high value capacitor and this produces a very high peak current,

responsible for many problems:



Spikes on the device supply voltage that cause oscillations (and thus noise) due to the

board parasitics



Turn ON overcurrent leads to a decrease in the efficiency and system reliability



Major EMI problems



Shorter freewheeling diode life

The fall time of the current during the turn OFF is also critical, as it produces voltage spikes

(due to the parasitics elements of the board) that increase the voltage drop across the

PDMOS.

In order to minimize these problems, a new driving circuit topology has been used and the

block diagram is shown in Figure 8. The basic idea is to change the current levels used to

turn the power switch ON and OFF, based on the PDMOS and the gate clamp status.

This circuitry allows the power switch to be turned OFF and ON quickly and addresses the

any cross conduction between the supply line and ground.

Figure 8. Driving circuitry

2.7

Thermal shutdown

The thermal shutdown block generates a signal that turns OFF the power stage if the

temperature of the chip goes higher than a fixed internal threshold (150 °C). The sensing

element of the chip is very close to the PDMOS area, ensuring fast and accurate

temperature detection. A hysteresis of approximately 20 °C avoids that the device turns ON

and OFF continuously.

Vgsmax

GATE

STOP

DRIVE

DRAIN

OFF

ON

PDMOS

VOUT

DRAIN

VCC

C

ESR

AM00009v1

ON/OFF

CONTROL

CLAMP

L