AN2507

The STATUS register and the ATN pin

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6

The STATUS register and the ATN pin

6.1

The STATUS register

A detailed description of each bit is stated in the datasheet.

Table 10.

STATUS register bits

Bit name

N/A

F_RUN

LED_F

NTC_W

NTC_H

OT_F

N/A

VOUTOK_N

MSB

LSB

Table 11.

Effect of the STATUS register bits on the operation of the device

Bit name

F_RUN

(STAT_REG)

LED_F

(STAT_REG)

NTC_W

(STAT_REG)

NTC_H

(STAT_REG)

OT_F

(STAT_REG)

VOUTOK_N

(STAT_REG)

Default value

0

0

0

0

0

0

NO

YES

YES

YES

YES

YES

Forces READY

mode when set

NO

YES

NO

YES

YES

YES

Sets ATN LOW when

set

NO

YES

YES

YES

YES

YES

1.

means that the bit is set and reset by internal signals in real-time

When the status register is latched, reading and writing to the registers is still possible, but the bits

TRIG_EN and TCH_ON in the COMMAND register and AUXL register cannot be changed, until the

device is unlatched. It is necessary to read the STATUS register to unlatch the device.

The ATN pin is also pulled down when the internal timer reaches zero in FLASH mode. In this case the

ATN pin is pulled down for 11 µs only. It is recommended to connect the ATN pin to the interrupt input of

the microcontroller. If it is not connected to the interrupt input, the ATN pin should be pulled fast enough

not to miss the 11 µs pulse, that is, by a programming loop which is entered after start of the FLASH

mode. This loop runs until the ATN pin gets Low. It is recommended to make a time-out of such a loop.