AN3250 datasheet(4/16 Pages) STMICROELECTRONICS

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Designing an M24LR64-R multi-bank application

AN3250

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Doc ID 17761 Rev 1

E0 and E1 inputs must be tied to VCC (‘1’) or VSS (‘0’) to establish the Device Select code.

When not connected (left floating), these inputs are read as low (‘0’). Using bits E0 and E1

of the Device Select code, up to four M24LR64-R devices can be accessed on the same I2C

bus. This enables emulation of up to 256 Kbits of EEPROM.

In the configuration example shown in Figure 5, in order to access 256 Kbits of EEPROM,

four 64-Kbit M24LR64-R devices are connected to the same I2C bus and the E0 and E1

signals of each device are assigned in a way to create an unique I2C address for each

specific device.

Figure 5.

Configuration example

M24LR64-R #0 (Bank 0)

Device addressed as (0,0): pin E0 connected to VSS and pin E1 connected to VSS.

M24LR64-R #1 (Bank 1)

Device addressed as (0,1): pin E0 connected to VCC and pin E1 connected to VSS.

VCC

Supply voltage

VSS

Ground

Device type identifier

Chip Enable address

Device Select code

1010

Device type identifier

Chip Enable address

Device Select code

1010

Table 2.

Signal descriptions (continued)

Signal name

Function

Direction

Ai12807a

VCC

M24LR64

VSS

VCC

M24LR64

VSS

VCC

M24LR64

VSS

VCC

M24LR64

VSS

I2C Bus

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