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AN4030 Datasheet(PDF) 9 Page - STMicroelectronics |
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AN4030 Datasheet(HTML) 9 Page - STMicroelectronics |
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9 / 15 page ![]() AN4030 Gate to cathode capacitor, impact on dV/dt immunity Doc ID 022635 Rev 1 9/15 Figure 8. IEC 61000-4-4 test configuration Table 3 and Table 4 give the test results for the two previous sample Triacs (logic level and snubberless) with and without gate to cathode capacitor. A burst test is carried out for each coupling mode (to line, to neutral, and to line and neutral). Only the minimum burst level before turn-on, for all coupling modes, is recorded in these two tables. Table 3. IEC 61000-4-4 tests results with logic level Triac - sensitive device (IGT = 10 mA) Without gate to cathode capacitor With gate to cathode capacitor (100 nF) With RG (100 Ω) and CGK (100 nF) Sample 1 Sample 2 Sample 1 Sample 2 Sample 1 Sample 2 Minimum held burst level (kV) 1.3 1.3 3.6 3.5 3.3 3.2 Table 4. IEC 61000-4-4 test results with snubberless Triac - less sensitive device (IGT = 35 mA) Without gate to cathode capacitor With gate to cathode capacitor (100 nF) With RG (100 Ω) and CGK (100 nF) Sample 1 Sample 2 Sample 1 Sample 2 Sample 1 Sample 2 Minimum held burst level (kV) > 4.5 > 4.5 > 4.5 > 4.5 > 4.5 > 4.5 CGK RG 1 nF X2 L N Reference plane 10 cm Burst generator Coupling network PE PE |
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