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UPD750064CU Datasheet(PDF) 19 Page - NEC |
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UPD750064CU Datasheet(HTML) 19 Page - NEC |
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19 / 82 page ![]() 19 µPD750064, 750066, 750068, 750064(A), 750066(A), 750068(A) Data Sheet U10165EJ2V0DS00 Figure 5-1. Program Memory Map ( µPD750064) 000H Address 765 4 MBE RBE 0 0 Internal reset start address (high-order 4 bits) 0 002H MBE RBE 0 0 INTBT/INT4 (high-order 4 bits) start address 004H MBE RBE 0 0 INT0 (high-order 4 bits) start address 006H MBE RBE 0 0 INT1 (high-order 4 bits) start address 008H MBE RBE 0 0 INTCSI (high-order 4 bits) start address 00AH MBE RBE 0 0 INTT0 (high-order 4 bits) start address 00CH MBE RBE 0 0 INTT1 (high-order 4 bits) start address 020H 07FH 080H 7FFH 800H FFFH GETI instruction reference table (low-order 8 bits) (low-order 8 bits) (low-order 8 bits) (low-order 8 bits) (low-order 8 bits) (low-order 8 bits) (low-order 8 bits) CALLF ! faddr instruction entry address Branch address of BR BCXA, BR BCDE, BR !addr, BRA !addr1Note or CALLA !addr1Note instruction CALL !addr instruction subroutine entry address BR $addr instruction relative branch address BRCB !caddr instruction branch address –15 to –1, +2 to +16 Branch destination address and subroutine entry address when GETI instruction is executed Internal reset start address INTBT/INT4 start address INT0 start address INT1 start address INTCSI start address INTT0 start address INTT1 start address Note Can be used only in the Mk II mode. Remark In addition to the above, a branch can be taken to the address indicated by changing only the low-order eight bits of PC by executing the BR PCDE or BR PCXA instruction. |
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