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TESDF5V0ARFG Datasheet(PDF) 4 Page - Taiwan Semiconductor Company, Ltd |
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TESDF5V0ARFG Datasheet(HTML) 4 Page - Taiwan Semiconductor Company, Ltd |
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4 / 5 page ![]() Small Signal Product APPLICATIONS INFORMATION ◇ Designed for the bi-directional protection of 2 lines form the damage caused by Electro Static Discharge (ESD) and surge pulses ◇ Be used on lines where the signal polarities are above and below ground ◇ Provides a surge capability of 100 Watts peak Ppp per line for an 8/20 ms waveform CIRCUIT BOARD LAYOUT RECOMMENDATIONS ◇ Place the ESD Protection array as close to the input terminal or connector as possible ◇ Keep parallel signal paths to a minimum ◇ Minimize all printed-circuit board conductive loops including power and group loops ◇ Advoid using shared transient return paths to a common ground point ◇ Ground planes should be used. For multilayer printed-circuit boards, use ground vias ◇ Below picture is the typical application for bi-directional protection of two lines Document Number: DS_S1501018 Version: C15 TESDF5V0A Taiwan Semiconductor IO#1 IO#2 To Protect Device TESDF5V0A |
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