PIC17C752-08SLASHP datasheet(186/320 Pages) MICROCHIP

186 / 320 page

PIC17C75X

DS30264A-page 186

TABLE 18-2: PIC17CXXX INSTRUCTION SET

Mnemonic,

Operands

Description

Cycles

16-bit Opcode

Status

Affected

Notes

MSb

LSb

BYTE-ORIENTED FILE REGISTER OPERATIONS

ADDWF

f,d ADD WREG to f

0000 111d

ffff

OV,C,DC,Z

ADDWFC f,d ADD WREG and Carry bit to f

0001 000d

ffff

OV,C,DC,Z

ANDWF

f,d AND WREG with f

0000 101d

ffff

CLRF

f,s Clear f, or Clear f and Clear WREG

0010 100s

ffff

None

COMF

f,d Complement f

0001 001d

ffff

CPFSEQ

Compare f with WREG, skip if f = WREG

1 (2)

0011 0001

ffff

None

6,8

CPFSGT

Compare f with WREG, skip if f > WREG

1 (2)

0011 0010

ffff

None

2,6,8

CPFSLT

Compare f with WREG, skip if f < WREG

1 (2)

0011 0000

ffff

None

2,6,8

DAW

f,s Decimal Adjust WREG Register

0010 111s

ffff

DECF

f,d Decrement f

0000 011d

ffff

OV,C,DC,Z

DECFSZ

f,d Decrement f, skip if 0

1 (2)

0001 011d

ffff

None

6,8

DCFSNZ

f,d Decrement f, skip if not 0

1 (2)

0010 011d

ffff

None

6,8

INCF

f,d Increment f

0001 010d

ffff

OV,C,DC,Z

INCFSZ

f,d Increment f, skip if 0

1 (2)

0001 111d

ffff

None

6,8

INFSNZ

f,d Increment f, skip if not 0

1 (2)

0010 010d

ffff

None

6,8

IORWF

f,d Inclusive OR WREG with f

0000 100d

ffff

MOVFP

f,p Move f to p

011p pppp

ffff

None

MOVPF

p,f Move p to f

010p pppp

ffff

MOVWF

Move WREG to f

0000 0001

ffff

None

MULWF

Multiply WREG with f

0011 0100

ffff

None

NEGW

f,s Negate WREG

0010 110s

ffff

OV,C,DC,Z

1,3

NOP

—

No Operation

0000 0000

0000

None

RLCF

f,d Rotate left f through Carry

0001 101d

ffff

RLNCF

f,d Rotate left f (no carry)

0010 001d

ffff

None

RRCF

f,d Rotate right f through Carry

0001 100d

ffff

RRNCF

f,d Rotate right f (no carry)

0010 000d

ffff

None

SETF

f,s Set f

0010 101s

ffff

None

SUBWF

f,d Subtract WREG from f

0000 010d

ffff

OV,C,DC,Z

SUBWFB f,d Subtract WREG from f with Borrow

0000 001d

ffff

OV,C,DC,Z

SWAPF

f,d Swap f

0001 110d

ffff

None

TABLRD

t,i,f Table Read

2 (3)

1010 10ti

ffff

None

TABLWT

t,i,f Table Write

1010 11ti

ffff

None

Legend: Refer to Table 18-1 for opcode ﬁeld descriptions.

Note 1: 2’s Complement method.

2: Unsigned arithmetic.

3: If s = '1', only the ﬁle is affected: If s = '0', both the WREG register and the ﬁle are affected; If only the Work-

ing register (WREG) is required to be affected, then f = WREG must be speciﬁed.

4: During an LCALL, the contents of PCLATH are loaded into the MSB of the PC and kkkk kkkk is loaded into

the LSB of the PC (PCL)

5: Multiple cycle instruction for EPROM programming when table pointer selects internal EPROM. The instruc-

tion is terminated by an interrupt event. When writing to external program memory, it is a two-cycle instruc-

tion.

6: Two-cycle instruction when condition is true, else single cycle instruction.

7: Two-cycle instruction except for TABLRD to PCL (program counter low byte) in which case it takes 3 cycles.

8: A “skip” means that instruction fetched during execution of current instruction is not executed, instead an

NOP is executed.

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