IN

OUT

S/D

ADJ

BYPASS

GND

LP3878-ADJ

**S/D

*0.01 µF

*4.7 µF

(Ceramic or

Tantalum

recommended)

*10 µF

(Ceramic

recommended)

R1

R2

LP3878-ADJ

www.ti.com

SNVS311D – MAY 2005 – REVISED FEBRUARY 2015

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

8.1 Application Information

The LP3878-ADJ can provide 800-mA output current with 2.5-V to 6-V output voltage. A minimum 10-µF output

capacitor is required for loop stability. An input capacitor of at least 4.7-µF is required also. The SHUTDOWN pin

must be tied to input if not used. A 10-nF bypass capacitor is required to improve loop stability, it also can reduce

stability. Output voltage can be set by two resistors R1 and R2 (see Figure 27), and R2 must be less than 5 k

Ω

to ensure loop stability.

8.2 Typical Application

*Capacitor values shown are minimum required to assure stability. Larger output capacitor provides improved

dynamic response. Output capacitor must meet ESR requirements (see Application Information).

**The SHUTDOWN (or S/D) pin must be actively terminated (see Device Functional Modes). Tie to IN (pin 4) if not

used.

Figure 27. Basic Application Circuit

8.2.1 Design Requirements

DESIGN PARAMETER

VALUE

Input voltage

3.8 V ±10%

Output voltage

1.8 V ±3%

Output current

800 mA (maximum)

Input capacitor

4.7 µF (minimum)

Output capacitor

10 µF (minimum)

Bypass capacitor

10 nF

External resistor R2

1 k

Ω (less than 5 kΩ)

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