PIC16LC712-04SLASHSS datasheet(26/108 Pages) MICROCHIP

26 / 108 page

PIC16C712/716

DS41106A-page 26

Preliminary

FIGURE 3-7:

BLOCK DIAGRAM OF RB7:RB4 PINS

TABLE 3-3

PORTB FUNCTIONS

Name

Bit#

Buffer

Function

RB0/INT

bit0

TTL/ST(1)

Input/output pin or external interrupt input. Internal software

programmable weak pull-up.

RB1/T1OS0/

T1CKI

bit1

TTL/ST(1)

Input/output pin or Timer 1 oscillator output, or Timer 1 clock input. Internal

software programmable weak pull-up. See Timer1 section for detailed

operation.

RB2/T1OSI

bit2

TTL/ST(1)

Input/output pin or Timer 1 oscillator input. Internal software programmable

weak pull-up. See Timer1 section for detailed operation.

RB3/CCP1

bit3

TTL/ST(1)

Input/output pin or Capture 1 input, or Compare 1 output, or PWM1 output.

Internal software programmable weak pull-up. See CCP1 section for

detailed operation.

RB4

bit4

TTL

Input/output pin (with interrupt on change). Internal software programmable

weak pull-up.

RB5

bit5

TTL

Input/output pin (with interrupt on change). Internal software programmable

weak pull-up.

RB6

bit6

TTL/ST(2)

Input/output pin (with interrupt on change). Internal software programmable

weak pull-up. Serial programming clock.

RB7

bit7

TTL/ST(2)

Input/output pin (with interrupt on change). Internal software programmable

weak pull-up. Serial programming data.

Legend: TTL = TTL input, ST = Schmitt Trigger input

Note 1: This buffer is a Schmitt Trigger input when configured as the external interrupt or peripheral input.

2: This buffer is a Schmitt Trigger input when used in serial programming mode.

Data Latch

From other

RBPU(1)

VDD

I/O

DATA BUS

WR PORT

WR TRIS

Set RBIF

TRIS Latch

RD TRIS

RD PORT

RB7:RB4 pins

weak

pull-up

RD PORT

Latch

TTL

Buffer

RB7:RB6 in serial programming mode

Note 1: To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit (OPTION_REG<7>).

VSS

VDD

PIC16LC712-04/SS Datasheet(PDF) 26 Page - Microchip Technology

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