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TC7135 Datasheet(PDF) 7 Page - Microchip Technology |
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TC7135 Datasheet(HTML) 7 Page - Microchip Technology |
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7 / 22 page  © 2002 Microchip Technology Inc. DS21460B-page 7 TC7135 3.2.1 SYSTEM ZERO During this phase, errors due to buffer, integrator, and comparator offset voltages are compensated for by charging CAZ (auto zero capacitor) with a compensat- ing error voltage. With a zero input voltage the integra- tor output will remain at zero. The external input signal is disconnected from the inter- nal circuitry by opening the two SWI switches. The internal input points connect to ANALOG COMMON. The reference capacitor charges to the reference volt- age potential through SWR. A feedback loop, closed around the integrator and comparator, charges the CAZ capacitor with a voltage to compensate for buffer ampli- fier, integrator, and comparator offset voltages (see Figure 3-2). FIGURE 3-2: SYSTEM ZERO PHASE 3.2.2 ANALOG INPUT SIGNAL INTEGRATION The TC7135 integrates the differential voltage between the +INPUT and -INPUT pins. The differential voltage must be within the device Common mode range; - 1V from either supply rail, typically. The input signal polar- ity is determined at the end of this phase. SeeFigure2-3 FIGURE 3-3: INPUT SIGNAL INTEGRATION PHASE 3.2.3 REFERENCE VOLTAGE INTEGRATION The previously-charged reference capacitor is con- nected with the proper polarity to ramp the integrator output back to zero (see Figure 3-4). The digital reading displayed is: EQUATION 3-3: FIGURE 3-4: REFERENCE VOLTAGE INTEGRATION CYCLE 3.2.4 INTEGRATOR OUTPUT ZERO This phase ensures the integrator output is at 0V when the system zero phase is entered. It also ensures that the true system offset voltages are compensated for. This phase normally lasts 100 to 200 clock cycles. If an overrange condition exists, the phase is extended to 6200 clock cycles (see Figure 3-5). FIGURE 3-5: INTEGRATOR OUTPUT ZERO PHASE . + - +IN REF IN Analog Common – IN SWR SWIZ SWZ SWZ Integrator Switch Closed Switch Open SWRI+ Comparator To Digital Section Analog Input Buffer RINT CINT CREF CSZ SWRI- SWI SWZ SWRI+SWRI- SWI SW1 + - Analog Common – IN Integrator Switch Closed Switch Open Comparator To Digital Section Analog Input Buffer RINT CINT CREF CSZ SWI +IN SWRI+ SWRI- REF IN SWR SWZ SWI SW1 SWRI+SWRI- SWIZ SWZ SWZ Reading = 10,000 [Differential Input] VREF + - REF IN Analog Common – IN Integrator Switch Closed Switch Open Comparator To Digital Section Analog Input Buffer RINT CINT CREF CSZ SWRI+ SWRI+SWRI- SWRI- SWI SWI SW1 SWR SWZ SWIZ SWZ SWZ +IN + - + IN Analog Common – IN Integrator Switch Closed Switch Open Comparator To Digital Section Analog Input Buffer CREF SWI SWRI+ SWRI- REF IN SWR SWZ SWI SWRI+SWRI- SW1 SWIZ SWZ RINT CINT CSZ SWZ |
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