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ATMEGA32L-8AI Datasheet(PDF) 14 Page - ATMEL Corporation |
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ATMEGA32L-8AI Datasheet(HTML) 14 Page - ATMEL Corporation |
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14 / 317 page ![]() 14 ATmega32(L) 2503F–AVR–12/03 AVR ATmega32 Memories This section describes the different memories in the ATmega32. The AVR architecture has two main memory spaces, the Data Memory and the Program Memory space. In addition, the ATmega32 features an EEPROM Memory for data storage. All three mem- ory spaces are linear and regular. In-System Reprogrammable Flash Program Memory The ATmega32 contains 32K bytes On-chip In-System Reprogrammable Flash memory for program storage. Since all AVR instructions are 16 or 32 bits wide, the Flash is orga- nized as 16K x 16. For software security, the Flash Program memory space is divided into two sections, Boot Program section and Application Program section. The Flash memory has an endurance of at least 10,000 write/erase cycles. The ATmega32 Program Counter (PC) is 14 bits wide, thus addressing the 16K program memory locations. The operation of Boot Program section and associated Boot Lock bits for software protection are described in detail in “Boot Loader Support – Read- While-Write Self-Programming” on page 242. “Memory Programming” on page 254 con- tains a detailed description on Flash Programming in SPI, JTAG, or Parallell Programming mode. Constant tables can be allocated within the entire program memory address space (see the LPM – Load Program Memory Instruction Description). Timing diagrams for instruction fetch and execution are presented in “Instruction Execu- tion Timing” on page 11. Figure 8. Program Memory Map $0000 $3FFF Application Flash Section Boot Flash Section |
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