ADC14X250 datasheet(49/69 Pages) TI1

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Periodic

Gapped-Periodic

One-Shot

TSYSREF = n*K*TFRAME

(n=1,2,3...)

•

2*TFRAME

•

2*TFRAME

100:

SYSREF

Transmitter

100:-diff

4*R1*R2 + 200*R1 = 100

R2 / (R1+R2) = 0.5 / VCMO

IDC (Each Side)= VCMO / (R1+R2)

VCMO = 1.2V: R1 = 29.1:, R2 = 20.8: IDC = 24mA

VCMO = 1.2V

VIS = 0.5V

1k:

SYSREF

Receiver

2.5k:

1.5k:

10k:

1.2V

PCB Channel

ADC14X250

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SLASE49 – DECEMBER 2015

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Figure 51. Example DC Coupling to the SYSREF Input

9.1.2.4 SYSREF Signaling

The SYSREF input may be driven by a number of different types of signals. The supported signal types, shown

in Figure 52 (in single-ended form), include periodic, gapped periodic, and one-shot signals. The rising edge of

the SYSREF signal is used as a reference to align the internal frame clock and local multi-frame clock (LMFC).

To ensure proper alignment of these system clocks, the SYSREF signal must be generated along with the CLKIN

signal such that the SYSREF rising edge meets the setup and hold requirements relative to the CLKIN at the

ADC14X250 device inputs.

For each rising clock edge that is detected at the SYSREF input, the ADC14X250 device compares the current

alignment of the internal frame and LMFC with the SYSREF edge and determines if the internal clocks must be

re-aligned. In the case that no alignment is needed, the clocks maintain their current alignment and the

JESD204B data link is not broken. In the case that re-alignment is needed, the JESD204B data link is broken

and the clocks are re-aligned.

Figure 52. SYSREF Signal Types (Single-Ended Representations)

In the case of a periodic SYSREF signal, the frame and LMFC alignment is established at the first rising edge of

SYSREF, and every subsequent rising edge (that properly meets setup and hold requirements) is ignored

because the alignment has already been established. A periodic SYSREF must have a period equal to n × K / FS

where ‘FS’ is the sampling rate, ‘K’ is the JESD204B configuration parameter indicating the number of frames per

multi-frame, and ‘n’ is an integer of one or greater. The duty cycle of the SYSREF signal should be greater than

2 / K but less than (K – 2) / K.

Gapped-period signals contain bursts of pulses. The frame and LMFC alignments are established on the first

rising edge of the pulse burst. The rising edges within the pulse burst must be spaced apart by n × K / FS

seconds, similar to the periodic SYSREF signal. Any rising edge that does not abide by this rule or does not

meet the setup and hold requirements forces re-alignment of the clocks. The duty cycle requirements are the

same as the periodic signal type.

A one-shot signal contains a single rising edge that establishes the frame and LMFC alignment. The single pulse

duration must be 2 × TFRAME or greater.

ADC14X250 Datasheet(PDF) 49 Page - Texas Instruments

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