L6362A datasheet(19/37 Pages) STMICROELECTRONICS

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L6362A

Receiver logic

DocID027660 Rev 4

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Receiver logic

The level of the signal on the I/Q pin is transferred to the OUTI/Q pin, according to the

receiver thresholds defined in and truth table below. The receiver is always active

independently on the EN/DIAG pin status. The IN1 pin sets the phase relation between I/Q

and OUTI/Q.

Table 15: I/Q truth table

EN/DIAG

IN2

IN1

I/Q

OUTI/Q

UVLO

Overtemperature

IN1 XOR I/Q(1)

Notes:

(1)The receiver keeps working in overtemperature conditions.

Thanks to the internal pull-up and pull-down resistors on OUTH, OUTL and I/Q pins, the

receiver logic can be used for the automatic identification of the load connection (high-side

or low-side) even in the 3-wire configurations. Referring to the table above, the

microcontroller (uC) can force the EN/DIAG = GND and read the information from OUT I/Q:

considering the voltage thresholds VI/QTHLH and VI/QTHHL, uC can know whether the

load is connected in high-side or low-side. The table below summarize the OUT I/Q logic

level according to the load connection and IN1 set-up.

Table 16: Load connection identification by OUTI/Q

EN/DIAG

IN2

IN1

OUTI/Q

PP-HS

PP-LS

GND

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