L6751B datasheet(27/58 Pages) STMICROELECTRONICS

Part #	L6751B

Description	Digitally controlled dual PWM for Intel VR12 and AMD SVI

PDF	58 Pages

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Manufacturer	STMICROELECTRONICS [STMicroelectronics]

Direct Link	http://www.st.com

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27 / 58 page

L6751B

Device configuration and pinstrapping tables

Doc ID 024028 Rev 1

27/58

Note:

Suggested values, divider needs to be connected between VCC5 pin and GND.

Transition between 1Phase and 2Phase operation is set to 12 A but disabled in PS00h.

Transition threshold specified as delta with respect to previous step (DPM23 is wrt DPM12).

GDC threshold is defined by combining GDC0 and GDC1 bits defined between the two

different pinstrappings DPM1-3 and DPM4-6. See Table 12 for details.

Dynamic phase management disabled, IC always working at maximum possible number of

phases except when in >PS00h when transitioning between 1Phase and 2Phase at 12 A.

Note:

GDC threshold is defined by combining GDC0 and GDC1 bits defined between the two

different pinstrappings DPM1-3 and DPM4-6. See Table 11 for details.

N is the number of phases programmed for the multi-phase section.

Table 12.

GDC threshold definition (Note 1)

GDC1

GDC0

Threshold [A] (Note 2)

GDC OFF

N17A

⋅

N13A

⋅

N9A

⋅

L6751B Datasheet(PDF) 27 Page - STMicroelectronics