LP38692MP-ADJSLASHNOPB datasheet(4/27 Pages) TI1

4 / 27 page

LP38690-ADJ, LP38692-ADJ

SNVS323I – DECEMBER 2004 – REVISED FEBRUARY 2016

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Product Folder Links: LP38690-ADJ LP38692-ADJ

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(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

If Military/Aerospace specified devices are required, contact the TI Sales Office/ Distributors for availability and specifications.

(3)

If used in a dual-supply system where the regulator load is returned to a negative supply, the output pin must be diode clamped to

ground.

(4)

At elevated temperatures, device power dissipation must be derated based on package thermal resistance and heatsink values (if a

heatsink is used). When using the WSON package, refer to Leadless Leadframe Package (LLP) (SNOA401) and the WSON Mounting

section in this datasheet. If power dissipation causes the junction temperature to exceed specified limits, the device goes into thermal

shutdown.

6 Specifications

6.1 Absolute Maximum Ratings

see

(1) (2)

MIN

MAX

UNIT

All pins (with respect to GND), VMAX

–0.3

IOUT

(3)

Internally Limited

Power dissipation(4)

Internally Limited

Junction temperature

−40

150

°C

Storage temperature, Tstg

−65

150

°C

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

6.2 ESD Ratings

VALUE

UNIT

V(ESD)

Electrostatic discharge

Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)

2000

6.3 Recommended Operating Conditions

MIN

MAX

UNIT

Supply voltage, VIN

2.7

Operating junction temperature, TJ

–40

125

°C

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report, SPRA953.

(2)

Thermal resistance value RθJA is based on EIA/JEDEC High-K printed circuit board defined by: JESD51-7 - High Effective Thermal

Conductivity Test Board for Leaded Surface Mount Packages.

(3)

The PCB for the WSON (NGG) package RθJA includes four (4) thermal vias under the exposed thermal pad per EIA/JEDEC JESD51-5.

6.4 Thermal Information

THERMAL METRIC(1)

LP38692-ADJ

LP3869x-ADJ

UNIT

NDC (SOT-223)

NGG (WSON)

5 PINS

6 PINS

RθJA

(2)

Junction-to-ambient thermal resistance, High-K

68.5

50.6(3)

°C/W

RθJC(top)

Junction-to-case (top) thermal resistance

52.2

44.4

°C/W

RθJB

Junction-to-board thermal resistance

13.0

24.9

°C/W

ψJT

Junction-to-top characterization parameter

5.5

0.4

°C/W

ψJB

Junction-to-board characterization parameter

12.8

25.1

°C/W

RθJC(bot)

Junction-to-case (bottom) thermal resistance

n/a

5.4

°C/W

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