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PI6C49019 Datasheet(PDF) 5 Page - Pericom Semiconductor Corporation |
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PI6C49019 Datasheet(HTML) 5 Page - Pericom Semiconductor Corporation |
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5 / 16 page ![]() 5 www.pericom.com PI6C49019 Rev. B 06/25/13 PI6C49019 Low Power Networking Clock Generator Serial Data Interface (SMBus) PI6C49019 is a slave only SMBus device that supports indexed block read and indexed block write protocol using a single 7-bit ad- dress and read/write bit as shown below. Address Assignment A6 A5 A4 A3 A2 A1 A0 W/R 1 1 0 1 0 0 1 0/1 How to Write 1 bit 8 bits 1 8 bits 1 8 bits 1 8 bits 1 8 bits 1 1 bit Start bit D2H Ack Register offset Ack Byte Count = N Ack Data Byte 0 Ack … Data Byte N - 1 Ack Stop bit Note: 1. Register offset for indicating the starting register for indexed block write and indexed block read. Byte Count in write mode cannot be 0. Byte 0: Spread Spectrum Control Register Bit Description Type Power Up Condition Output(s) Affected Notes 7 Spread Select for 100MHz HCSL PCI-Express clocks RW 0 All 100MHz HCSL PCI-Express outputs 0=spread off 1=-0.5% down 6 Enables hardware or software control of OE bits (see Byte 0-Bit 6 and Bit 5 Functionality table) RW 0 PD_RESET , bit 5 0 = hardware cntl 1 = software ctrl 5 Software PD_RESET bit. Enables or disables all outputs. (see Byte 0-Bit 6 and Bit 5 Functionality table) RW 1 All outputs 0 = disabled 1 = enabled 4 Spread Select for 33.33/67.33 MHz S1 RW 0 33MHz LVCMOS output pin 15 See Table1 on Page4 3 Spread Select for 33.33/67.33 MHz Page 4 S0 RW 0 2 OE for single-ended 25 MHz RW 1 25M 0 = disabled 1 = enabled 1 Frequency Select Bit RW 1 125M/REF 0 = REF 1 = 125M 0 OE for single-ended 125 MHz/REF RW 1 Single-ended 125MHz/REF pin 30 0 = disabled 1 = enabled How to Read (M: abbreviation for Master or Controller; S: abbreviation for slave/clock) 1 bit 8 bits 1 bit 8 bits 1 bit 1 bit 8 bits 1 bit 8 bits 1 bit 8 bits 1 bit … 8 bits 1 bit 1 bit M: Start bit M: Send "D2h" S: sends Ack M: send starting databyte location: N S: sends Ack M: Start bit M: Send "D3h" S: sends Ack S: sends # of data bytes that will be sent: X M: sends Ack S: sends start- ing data byte N M: sends Ack … S: sends data byte N+X- 1 M: Not Ac- knowl- edge M: Stop bit 13-0103 |
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