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03/03/15

PI6CFGL202B

Low Power PCIe 3.0 Clock Generator with 2 HCSL Outputs

Electrical Characteristics–Current Consumption

(T

o

C; VDD = 3.3V+/-10%; VDDO = 1.8V+/-10%, See Test Loads for Loading Conditions)

Symbol

Parameters

Condition

Min. Typ. Max. Units

I

DDOP

Total power consumption, All outputs active

@100MHz

52

mA

Notes:

1. Guaranteed by design and characterization, not 100% tested in production.

Supply Voltage to Ground Potential......................................................4.6V

Ambient Operating Temperature........................................... -40 to +85°C

Storage Temperature.......................................................... –65°C to +150°C

Junction Temperature .......................................................................... 125°C

Soldering Temperature.........................................................................260°C

ESD Protection (Input) ...........................................................2000V(HBM)

Note: Stresses greater than those listed under MAXIMUM RAT-

INGS may cause permanent damage to the device. This is a stress

rating only and functional operation of the device at these or any

other conditions above those indicated in the operational sections

of this specification is not implied. Exposure to absolute maximum

rating conditions for extended periods may affect reliability.

Maximum Ratings

(Above which useful life may be impaired. For user guidelines, not tested.)

Electrical Characteristics–Input/Supply/Common Parameters–Normal Operating

o

C; VDD = 3.3V+/-10%; VDDO = 1.8V+/-10%, See Test Loads for Loading Conditions)

Symbol

Parameters

Condition

Min. Typ.

Max. Units

V

DDX

Supply voltage for core, analog

3.0

3.3

3.6

V

V

DDO

Supply voltage outputs

1.65

1.8

2.0

V

V

IH

OE, S0, S1, SS0, SS1

0.65

V

DD

V

0.3

V

V

IL

OE, S0, S1, SS0, SS1

-0.3

0.35

V

DD

V

I

IN

Single-ended inputs, V

clude XTAL pin)

-5

5

uA

I

INP

Single-ended inputs

V

V

-200

200

uA

Fin

XTAL or X1 input

23

25

26

MHz

Lpin

7

nH

C

IN

Logic Inputs, except DIF_IN

1.5

5

pF

C

INDIF_IN

DIF_IN differential clock inputs

1.5

2.7

pF

C

OUT

Output pin capacitance

6

pF

T

STAB

From V

stabilization

0.6

1

ms

15-0025