6

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03/03/15

PI6CFGL202B

Low Power PCIe 3.0 Clock Generator with 2 HCSL Outputs

Electrical Characteristics–Phase Jitter Parameters

(T

o

C; VDD = 3.3V+/-10%; VDDO = 1.8V+/-10%, See Test Loads for Loading Conditions)

Symbol

Parameters Condition

Min. Typ. Industry Limit

Units

t

jphPCIeG1

Phase Jitter,

PCI Express

25

86

ps

(p-p)

t

jphPCIeG2

PCIe Gen 2 Low Band

0.9

3

ps

(rms)

PCIe Gen 2 High Band

1.6

3.1

ps

(rms)

t

jphPCIeG3

PCIe Gen 3

0.36

1

ps

(rms)

Notes:

1. Guaranteed by design and characterization, not 100% tested in production.

2. See http://www.pcisig.com for complete specs.

3. Sample size of at least 100k cycles. This figures extrapolates to 108ps pk-pk @ 1M cycles for a BER of 1-12.

4. Calculated from Intel-supplied Clock Jitter Tool.

5. Applies to all different outputs.

Thermal Characteristics

Symbol

Parameter

Conditions

Min.

Typ.

Max.

Unit

Thermal Resistance Junction to Ambient

Still air

90

°C/W

Thermal Resistance Junction to Case

24

°C/W

15-0025