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S6E2C5 Datasheet(PDF) 86 Page - Cypress Semiconductor |
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S6E2C5 Datasheet(HTML) 86 Page - Cypress Semiconductor |
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86 / 200 page ![]() Document Number: 002-04984 Rev.*A Page 86 of 200 S6E2C5 Series 11. Pin Status in Each CPU State The terms used for pin status have the following meanings: INITX = 0 This is the period when the INITX pin is at the L level. INITX = 1 This is the period when the INITX pin is at the H level. SPL = 0 This is the status that the standby pin level setting bit (SPL) in the standby mode control register (STB_CTL) is set to 0. SPL = 1 This is the status that the standby pin level setting bit (SPL) in the standby mode control register (STB_CTL) is set to 1. Input enabled Indicates that the input function can be used. Internal input fixed at 0 This is the status that the input function cannot be used. Internal input is fixed at L. Hi-Z Indicates that the pin drive transistor is disabled and the pin is put in the Hi-Z state. Setting disabled Indicates that the setting is disabled. Maintain previous state Maintains the state that was immediately prior to entering the current mode. If a built-in peripheral function is operating, the output follows the peripheral function. If the pin is being used as a port, that output is maintained. Analog input is enabled Indicates that the analog input is enabled. Trace output Indicates that the trace function can be used. GPIO selected In Deep standby mode, pins switch to the general-purpose I/O port. Setting prohibition Prohibition of a setting by specification limitation |
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