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74LVC3G04DP Datasheet(PDF) 8 Page - NXP Semiconductors |
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74LVC3G04DP Datasheet(HTML) 8 Page - NXP Semiconductors |
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8 / 13 page ![]() 9397 750 13075 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 — 4 May 2004 8 of 13 Philips Semiconductors 74LVC3G04 Triple inverter Test data is given in Table 10. Definitions test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. Fig 6. Load circuitry for switching times. Table 10: Test data Supply voltage Input Load VEXT VCC VI tr = tf CL RL tPLH, tPHL tPZH, tPHZ tPZL, tPLZ 1.65 V to 1.95 V VCC ≤ 2.0 ns 30 pF 1 k Ω open GND 2 × VCC 2.3 V to 2.7 V VCC ≤ 2.0 ns 30 pF 500 Ω open GND 2 × VCC 2.7 V 2.7 V ≤ 2.5 ns 50 pF 500 Ω open GND 6 V 3.0 V to 3.6 V 2.7 V ≤ 2.5 ns 50 pF 500 Ω open GND 6 V 4.5 V to 5.5 V VCC ≤ 2.5 ns 50 pF 500 Ω open GND 2 × VCC VEXT VCC VI VO mna616 D.U.T. CL RT RL RL PULSE GENERATOR |
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