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LM25119PSQE/NOPB Datasheet(PDF) 13 Page - Texas Instruments

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Part # LM25119PSQE/NOPB
Description  Wide Input Range, Dual Synchronous Buck Controller
PDF  39 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

LM25119PSQE/NOPB Datasheet(HTML) 13 Page - Texas Instruments

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L
COUT
SW
VCC
VOUT
13
LM25119, LM25119-Q1
www.ti.com
SNVS680H – AUGUST 2010 – REVISED MAY 2016
Product Folder Links: LM25119
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Copyright © 2010–2016, Texas Instruments Incorporated
7.3 Feature Description
7.3.1 High Voltage Start-Up Regulator
The LM25119 contains two internal high voltage bias regulators, VCC1 and VCC2, that provide the bias supply
for the PWM controllers and gate drive for the MOSFETs of each regulator channel. The input pin (VIN) can be
connected directly to an input voltage source as high as 42 V. The outputs of the VCC regulators are set to
7.6 V. When the input voltage is below the VCC set-point level, the VCC output tracks the VIN with a small
dropout voltage. If VCC1 is in an undervoltage condition, channel2 is disabled. This interdependence is
necessary to prevent channel2 from running open-loop in the single output interleaved mode when the channel2
error amplifier is disabled (if either VCC is in UV, both channels are disabled).
The outputs of the VCC regulators are current limited at 25-mA (minimum) output capability. Upon power up, the
regulators source current into the capacitors connected to the VCC pins. When the voltage at the VCC pins
exceed 4 V and the UVLO pin is greater than 1.25 V, both channels are enabled and a soft-start sequence
begins. Both channels remain enabled until either VCC pin falls below 3.8 V, the UVLO pin falls below 1.25 V or
the die temperature exceeds the thermal limit threshold.
When operating at higher input voltages the bias power dissipation within the controller can be excessive. An
output voltage derived bias supply can be applied to a VCC pins to reduce the IC power dissipation. The
VCCDIS input can be used to disable the internal VCC regulators when external biasing is supplied.
If VCCDIS > 1.25 V, the internal VCC regulators are disabled. The externally supplied bias must be coupled to
the VCC pins through a diode, preferably a Schottky (low forward voltage). VCCDIS has a 500-k
Ω internal
pulldown resistance to ground for normal operation with no external bias. The internal pulldown resistance can
be overridden by pulling VCCDIS above 1.25 V through a resistor divider connected to an external bias supply.
The VCC regulator series pass transistor includes a diode between VCC and VIN that must not be forward-
biased in normal operation.
If the external bias winding can supply VCC greater than VIN, an external blocking diode is required from the
input power supply to the VIN pin to prevent the external bias supply from passing current to the input supply
through the VCC pins. For VOUT between 5 V and 14.5 V, VOUT can be connected directly to VCC through a
diode. For VOUT < 5 V, a bias winding on the output inductor can be added as shown in Figure 8.
Figure 8. VCC Bias Supply With Additional Inductor Winding
In high voltage applications, take extra care to ensure the VIN pin does not exceed the absolute maximum
voltage rating of 45 V. During line or load transients, voltage ringing on the VIN line that exceeds the absolute
maximum rating can damage the IC. Both careful PCB layout and the use of quality bypass capacitors located
close to the VIN and AGND pins are essential.
7.3.2 UVLO
The LM25119 contains a dual-level undervoltage lockout (UVLO) circuit. When the UVLO pin is less than 0.4 V,
the LM25119 is in shutdown mode. The shutdown comparator provides 100 mV of hysteresis to avoid chatter
during transitions. When the UVLO pin voltage is greater than 0.4 V but less than 1.25 V, the controller is in
standby mode. In the standby mode the VCC bias regulators are active but the controller outputs are disabled.
This feature allows the UVLO pin to be used as a remote enable or disable function. When the VCC outputs
exceed their respective undervoltage thresholds (4 V) and the UVLO pin voltage is greater than 1.25 V, the
outputs are enabled and normal operation begins.



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