LM9076 datasheet(11/20 Pages) TI1

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LM9076

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SNVS260L – NOVEMEBER 2003 – REVISED MARCH 2013

When the SHUTDOWN pin is low, or left open, the regulator is switched On. When an unregulated supply, such

as V BATTERY , is used to pull the SHUTDOWN pin high a series resistor in the range of 10K

Ω to 50KΩ is

recommended to provide reverse voltage transient protection of the SHUTDOWN pin. Adding a small capacitor

(0.001uF typical) from the SHUTDOWN pin to Ground will add noise immunity to prevent accidental turn on due

to noise on the supply line.

RESET FLAG

The RESET pin is an open collector output which requires an external pull-up resistor to develop the reset signal.

The external pull-up resistor should be in the range of 10 k

Ω to 200 kΩ.

At VIN values of less than typically 2V the RESET pin voltage will be high. For VIN values between typically 2V

and approximately VOUT + VBE the RESET pin voltage will be low. For VIN values greater than approximately

VOUT + VBE the RESET pin voltage will be dependent on the status of the VOUT pin voltage and the Delayed

Reset circuitry. The value of VBE is typically 600 mV at 25°C and will decrease approximately 2 mV for every 1°C

increase in the junction temperature. During normal operation the RESET pin voltage will be high .

Any load condition that causes the VOUT pin voltage to drop below typically 89% of normal will activate the

Delayed Reset circuit and the RESET pin will go low for the duration of the delay time.

Any line condition that causes VIN pin voltage to drop below typically VOUT + VBE will cause the RESET pin to go

low without activating the Delayed Reset circuitry.

Excessive thermal dissipation will raise the junction temperature and could activate the Thermal Shutdown

circuitry which, in turn, will cause the RESET pin to go low.

For the LM9076BMA devices, pulling the SHUTDOWN pin high will turn off the output which, in turn, will cause

the RESET pin to go low once the VOUT voltage has decayed to a value that is less than typically 89% of normal.

See Figure 25.

RESET DELAY TIME

When the regulator output is switched On, or after recovery from brief VOUT fault condition, the RESET flag can

be can be programmed to remain low for an additional delay time. This will give time for any system reference

voltages, clock signals, etc., to stabilize before the micro-controller resumes normal operation.

This delay time is controlled by the capacitor value on the CDELAY pin. During normal operation the CDELAY

capacitor is charged to near VOUT . When a VOUT fault causes the RESET pin to go low, the CDELAY capacitor is

quickly discharged to ground. When the VOUT fault is removed, and VOUT returns to the normal operating value,

the CDELAY capacitor begins charging at a typical constant 0.420 uA rate. When the voltage on the CDELAY

capacitor reaches the same potential as the VOUT pin the RESET pin will be allowed to return high.

The typical RESET delay time can be calculated with the following formula:

tDELAY = VOUT X (CDELAY / IDELAY )

(1)

For the LM9076–3.3 with a CDELAY value of 0.001 uF and a IDELAY value of 0.420 uA the typical RESET delay

time is:

tDELAY =3.3V × (0.001 uF / 0.420 uA) = 7.8 ms

(2)

For the LM9076–5.0 with a CDELAY value of 0.001 uF and a IDELAY value of 0.420 uA the typical RESET delay

time is:

tDELAY = 5.0V X (0.001uF / 0.420uA) = 11.9 ms

(3)

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