TMS320C6472ECTZ datasheet(201/269 Pages) TI1

201 / 269 page

TMS320C6472

www.ti.com

SPRS612G

– JUNE 2009 – REVISED JULY 2011

Table 7-79. DMATCU Channel Registers (continued)

HEX ADDRESS RANGE

ACRONYM

0254 1120 - 0254 113C

Transmit Channel 4 Config B Registers

0254 1140 - 0254 115C

Transmit Channel 5 Config A Registers

0254 1160 - 0254 117C

Transmit Channel 5 Config B Registers

0254 1180 - 0254 17FC

Reserved

0254 1800 - 0254 181C

Receive Channel 0 Config A Registers

0254 1820 - 0254 183C

Receive Channel 0 Config B Registers

0254 1840 - 0254 185C

Receive Channel 1 Config A Registers

0254 1860 - 0254 187C

Receive Channel 1 Config B Registers

0254 1880 - 0254 189C

Receive Channel 2 Config A Registers

0254 18A0 - 0254 18BC

Receive Channel 2 Config B Registers

0254 18C0 - 0254 18DC

Receive Channel 3 Config A Registers

0254 18E0 - 0254 18FC

Receive Channel 3 Config B Registers

0254 1900 - 0254 191C

Receive Channel 4 Config A Registers

0254 1920 - 0254 193C

Receive Channel 4 Config B Registers

0254 1940 - 0254 195C

Receive Channel 5 Config A Registers

0254 1960 - 0254 197C

Receive Channel 5 Config B Registers

0254 1980 - 0254 19FC

Reserved

Table 7-80. DMATCU Transmit Channels 0-5 Registers

HEX ADDRESS RANGE

ACRONYM

0254 1000

DXCH_ABASE0

Transmit Channel 0 Memory Base Address Register A

0254 1004

DXCH_AFALLOC0

Transmit Channel 0 Frame Allocation Register A

0254 1008

DXCH_AFSIZE0

Transmit Channel 0 Frame Size Register A

0254 100C

DXCH_AFCNT0

Transmit Channel 0 Frame Count Register A

0254 1010 - 0254 101C

Reserved

0254 1020

DXCH_BBASE0

Transmit Channel 0 Memory Base Address Register B

0254 1024

DXCH_BFALLOC0

Transmit Channel 0 Frame Allocation Register B

0254 1028

DXCH_BFSIZE0

Transmit Channel 0 Frame Size Register B

0254 102C

DXCH_BFCNT0

Transmit Channel 0 Frame Count Register B

0254 1030 - 0254 103C

Reserved

0254 1040

DXCH_ABASE1

Transmit Channel 1 Memory Base Address Register A

0254 1044

DXCH_AFALLOC1

Transmit Channel 1 Frame Allocation Register A

0254 1048

DXCH_AFSIZE1

Transmit Channel 1 Frame Size Register A

0254 104C

DXCH_AFCNT1

Transmit Channel 1 Frame Count Register A

0254 1050 - 0254 105C

Reserved

0254 1060

DXCH_BBASE1

Transmit Channel 1 Memory Base Address Register B

0254 1064

DXCH_BFALLOC1

Transmit Channel 1 Frame Allocation Register B

0254 1068

DXCH_BFSIZE1

Transmit Channel 1 Frame Size Register B

0254 106C

DXCH_BFCNT1

Transmit Channel 1 Frame Count Register B

0254 1070 - 0254 107C

Reserved

0254 1080

DXCH_ABASE2

Transmit Channel 2 Memory Base Address Register A

0254 1084

DXCH_AFALLOC2

Transmit Channel 2 Frame Allocation Register A

0254 1088

DXCH_AFSIZE2

Transmit Channel 2 Frame Size Register A

0254 108C

DXCH_AFCNT2

Transmit Channel 2 Frame Count Register A

0254 1090 - 0254 109C

Reserved

0254 10A0

DXCH_BBASE2

Transmit Channel 2 Memory Base Address Register B

0254 10A4

DXCH_BFALLOC2

Transmit Channel 2 Frame Allocation Register B

C64x+ Peripheral Information and Electrical Specifications

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