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TMS320C6472ECTZ Datasheet(PDF) 202 Page - Texas Instruments

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Part # TMS320C6472ECTZ
Description  TMS320C6472 Fixed-Point Digital Signal Processor
PDF  269 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TMS320C6472ECTZ Datasheet(HTML) 202 Page - Texas Instruments

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TMS320C6472
SPRS612G
– JUNE 2009 – REVISED JULY 2011
www.ti.com
Table 7-80. DMATCU Transmit Channels 0-5 Registers (continued)
HEX ADDRESS RANGE
ACRONYM
REGISTER NAME
0254 10A8
DXCH_BFSIZE2
Transmit Channel 2 Frame Size Register B
0254 10AC
DXCH_BFCNT2
Transmit Channel 2 Frame Count Register B
0254 10B0 - 0254 10BC
-
Reserved
0254 10C0
DXCH_ABASE3
Transmit Channel 3 Memory Base Address Register A
0254 10C4
DXCH_AFALLOC3
Transmit Channel 3 Frame Allocation Register A
0254 10C8
DXCH_AFSIZE3
Transmit Channel 3 Frame Size Register A
0254 10CC
DXCH_AFCNT3
Transmit Channel 3 Frame Count Register A
0254 10D0 - 0254 10DC
-
Reserved
0254 10E0
DXCH_BBASE3
Transmit Channel 3 Memory Base Address Register B
0254 10E4
DXCH_BFALLOC3
Transmit Channel 3 Frame Allocation Register B
0254 10E8
DXCH_BFSIZE3
Transmit Channel 3 Frame Size Register B
0254 10EC
DXCH_BFCNT3
Transmit Channel 3 Frame Count Register B
0254 10F0 - 0254 10FC
-
Reserved
0254 1100
DXCH_ABASE4
Transmit Channel 4 Memory Base Address Register A
0254 1104
DXCH_AFALLOC4
Transmit Channel 4 Frame Allocation Register A
0254 1108
DXCH_AFSIZE4
Transmit Channel 4 Frame Size Register A
0254 110C
DXCH_AFCNT4
Transmit Channel 4 Frame Count Register A
0254 1110 - 0254 111C
-
Reserved
0254 1120
DXCH_BBASE4
Transmit Channel 4 Memory Base Address Register B
0254 1124
DXCH_BFALLOC4
Transmit Channel 4 Frame Allocation Register B
0254 1128
DXCH_BFSIZE4
Transmit Channel 4 Frame Size Register B
0254 112C
DXCH_BFCNT4
Transmit Channel 4 Frame Count Register B
0254 1130 - 0254 113C
-
Reserved
0254 1140
DXCH_ABASE5
Transmit Channel 5 Memory Base Address Register A
0254 1144
DXCH_AFALLOC5
Transmit Channel 5 Frame Allocation Register A
0254 1148
DXCH_AFSIZE5
Transmit Channel 5 Frame Size Register A
0254 114C
DXCH_AFCNT5
Transmit Channel 5 Frame Count Register A
0254 1150 - 0254 115C
-
Reserved
0254 1160
DXCH_BBASE5
Transmit Channel 5 Memory Base Address Register B
0254 1164
DXCH_BFALLOC5
Transmit Channel 5 Frame Allocation Register B
0254 1168
DXCH_BFSIZE5
Transmit Channel 5 Frame Size Register B
0254 116C
DXCH_BFCNT5
Transmit Channel 5 Frame Count Register B
0254 1170 - 0254 117C
-
Reserved
Table 7-81. DMATCU Receive Channels 0-5 Registers
HEX ADDRESS RANGE
ACRONYM
REGISTER NAME
0254 1800
DRCH_ABASE0
Receive Channel 0 Memory Base Address Register A
0254 1804
DRCH_AFALLOC0
Receive Channel 0 Frame Allocation Register A
0254 1808
DRCH_AFSIZE0
Receive Channel 0 Frame Size Register A
0254 180C
DRCH_AFCNT0
Receive Channel 0 Frame Count Register A
0254 1810 - 0254 181C
-
Reserved
0254 1820
DRCH_BBASE0
Receive Channel 0 Memory Base Address Register B
0254 1824
DRCH_BFALLOC0
Receive Channel 0 Frame Allocation Register B
0254 1828
DRCH _BFSIZE0
Receive Channel 0 Frame Size Register B
0254 182C
DRCH _BFCNT0
Receive Channel 0 Frame Count Register B
0254 1830 - 0254 183C
-
Reserved
0254 1840
DRCH_ABASE1
Receive Channel 1 Memory Base Address Register A
202
C64x+ Peripheral Information and Electrical Specifications
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© 2009–2011, Texas Instruments Incorporated
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Product Folder Link(s) :TMS320C6472



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