TNETE2201B

1.25GIGABIT ETHERNET TRANSCEIVER

SLLS367D − JUNE 1999 − REVISED AUGUST 2007

15

POST OFFICE BOX 655303

APPLICATION INFORMATION

Host

Protocol

Device

TD0 − TD9

10

/

REFCLK

LCKREFN

LOOPEN

SYNCEN

SYNC

RD0 − RD9

RBC0,RBC1

RC1

RC0

DOUT_TXP

DOUT_TXN

DIN_RXP

DIN_RXN

TC1

TC0

VCC_TX

VCC_RX

Controlled Impedance

Transmission Line

Controlled Impedance

Transmission Line

Controlled Impedance

Transmission Line

Controlled Impedance

Transmission Line

PLL Filter

Capacitor = 2 nF or 0.1

µF

(see Note C)

PLL Filter

Capacitor = 2 nF or 0.1

µF

(see Note C)

TNETE2201B

3.3 V

3.3 V

10

/

2

/

50

18

22

27

19

24

47

31,30

62

61

54

52

49

48

16

17

GND_RX

GND_TX

51

15

Ferrite Bead

Ferrite Bead

0.01

µF

0.01

µF

R(pd)

(see Note A)

5

Ω at 100 MHz

50

Ω − 75 Ω

Vt

(see Note B)

NOTES: A. R(pd) − This value is set to match the falling edge to rising edge transistion times, typically 150

Ω. to 220 Ω..

B. Vt (termination voltage): Vt = VCC − 1.3 V, if ac coupled

Vt = VCC − 2 V, if directly coupled.

C. A filter capacitor value of 0.1

µF can be used with the following consideration: The tracking bandwidth of the PLL will be reduced

due to the larger filter capacitor. This reduces the transmit and receive PLL’s ability to reject low-frequency noise or wonder in the

voltage supply or datastream. Care must be taken in the filtering of the supply VCC_TX (terminal 18) and VCC_RX (terminal 50) to

reject power supply noise.

Figure 8. Typical Application Circuit