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AR0130CSSC00SPBA0-DP1 Datasheet(PDF) 46 Page - ON Semiconductor |
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AR0130CSSC00SPBA0-DP1 Datasheet(HTML) 46 Page - ON Semiconductor |
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46 / 49 page ![]() AR0130CS/D Rev. 12, 1/16 EN 46 ©Semiconductor Components Industries, LLC, 2016. AR0130CS: 1/3-Inch CMOS Digital Image Sensor Power-On Reset and Standby Timing Power-Down Sequence The recommended power-down sequence for the AR0130 is shown in Figure 32. The available power supplies (VDD_IO, VDD, VDD_SLVS, VDD_PLL, VAA, VAA_PIX) must have the separation specified below. 1. Disable streaming if output is active by setting standby R0x301a[2] = 0 2. The soft standby state is reached after the current row or frame, depending on config- uration, has ended. 3. Turn off VDD_SLVS, if used. 4. Turn off VDD_IO. 5. Turn off VDD. 6. Turn off VAA/VAA_PIX. 7. Turn off VDD_PLL. Figure 32: Power Down Note: t4 is required between power down and next power up time; all decoupling caps from regulators must be completely discharged. Table 20: Power-Down Sequence Definition Symbol Minimum Typical Maximum Unit VDD_SLVS to VDD_IO t0 0 – – s VDD_IO to VDD t1 0 – – s VDD to VAA/VAA_PIX t2 0 – – s VAA/VAA_PIX to VDD_PLL t3 0 – – s PwrDn until Next PwrUp Time t4 100 – – ms V DD_IO (1.8/2.8) t4 t 0 t1 t3 t2 EXTCLK VDD_SLVS VDD (1.8) VAA_PIX VAA (2.8) VDD_PLL (2.8) Power Down until next Power up cycle |
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