TUSB8020B

SLLSEF6A – JULY 2014 – REVISED JULY 2014

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Pin Functions (continued)

PIN

TYPE

(1)

DESCRIPTION

NAME

NO.

I

I

When SMBUSz = 1, this terminal acts as the serial clock interface for an I

I/O

SCL/SMBCLK

2

When SMBUSz = 0, this terminal acts as the serial clock interface for an SMBus host.

PD

This pin must be pulled up to use the OTP ROM.

Can be left unconnected if external interface not implemented.

I

When SMBUSz = 1, this terminal acts as the serial data interface for an I

I/O

SDA/SMBDAT

3

When SMBUSz = 0, this terminal acts as the serial data interface for an SMBus host.

PD

This pin must be pulled up to use the OTP ROM.

Can be left unconnected if external interface not implemented.

TEST AND MISCELLANEOUS SIGNALS

SMBUS mode / SuperSpeed USB Status for downstream port 2

The value of the terminal is sampled at the deassertion of reset to enable I

I

0 = SMBus mode selected

SMBUSz/SS_DN2

22

PU

1 = I

After reset, this signal indicates the SuperSpeed USB connection status of downstream port 2. A value of 1 indicates the

connection is SuperSpeed USB.

Power control polarity / SuperSpeed USB status for downstream port 1.

The value of the terminal is sampled at the deassertion of reset to set the polarity of PWRCTL[2:1].

I/O

0 = PWRCTL polarity is active high.

PWRCTL_POL/SS_DN1

21

PD

1 = PWRCTL polarity is active low.

After reset, this signal indicates the SuperSpeed USB connection status of downstream port 1. A value of 1 indicates the

connection is SuperSpeed USB.

Ganged operation enable/SMBus address bit 2/ high-speed status for upstream port

The value of the terminal is sampled at the deassertion of reset to set the power switch and over current detection mode as

follows:

0 = Individual power control supported when power switching is enabled.

GANGED/SMBA2/

I

35

1 = Power control gangs supported when power switching is enabled.

HS_UP

PU

When SMBus mode is enabled using SMBUSz, this terminal sets the value of the SMBus slave address bit 2. SMBus slave

address bits 2 and 3 are always 1 for the TUSB8020B.

After reset, this signal indicates the high-speed USB connection status of the upstream port. A value of 1 indicates the upstream

port is connected to a high-speed USB capable port.

Full power management enable/ SMBus Address bit 1/ Super-Speed USB status for upstream port

The value of the terminal is sampled at the deassertion of reset to set the power switch control follows:

0 = Power switching supported

1 = Power switching not supported

Full power management is the ability to control power to the downstream ports of the TUSB8020B using

FULLPWRMGMTz/

36

I, PU

PWRCTL[2:1]/BATEN[2:1].

SMBA1/SS_UP

When SMBus mode is enabled using SMBUSz, this terminal sets the value of the SMBus slave address bit 1. SMBus slave

address bit 3 is always 1 for the TUSB8020B.

Can be left unconnected if full power management and SMBus are not implemented.

After reset, this signal indicates the SuperSpeed USB connection status of the upstream port. A value of 1 indicates the

upstream port is connected to a SuperSpeed USB capable port.

I

TEST mode enable. When this terminal is asserted high at reset enables test mode. This terminal is reserved for factory use. It

TEST

10

PD

is recommended to pull-down this terminal to ground.

POWER AND GROUND SIGNALS

1, 12, 18, 30,

VDD

PWR

1.1-V power rail

34, 45

7, 13, 23, 25,

VDD33

PWR

3.3-V power rail

33, 37, 40, 48

GND

PAD

—

Ground

6

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