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MT9072AB Datasheet(PDF) 204 Page - Zarlink Semiconductor Inc |
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MT9072AB Datasheet(HTML) 204 Page - Zarlink Semiconductor Inc |
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204 / 275 page ![]() MT9072 Data Sheet 204 Zarlink Semiconductor Inc. 17.2.7 Interrupt Vector Mask and Interrupt Mask Registers (Y4X) Bit Functions Tables 125 and 126 describe the bit functions of the Interrupt Vector Masks, while tables 186 to 189 describe the bit functions of each of the Interrupt Mask Registers in the MT9072. Each interrupt mask register is repeated for each of the 8 framers (not the Interrupt Vector Masks). Framer 0 is addressed with Y=0, Framer 1 with Y=1, Framer 2 with Y=2 and so on up to Framer 7 with Y=7 (where Y represents the 4 most significant address bits (MSB) A11-A8). In addition, a simultaneous write to all 8 framers is possible by setting the MSB address to Y=8 (1000). However, since the Interrupt Vector Masks are common to all eight framers, only addresses 902 and 903 may be used to read from or write to these registers. A (0), (1) or (#) in the “Name” column of these tables indicates the state of the data bits after a reset (RESET, RSTC or RST). The (#) indicates that a (0) or (1) is possible. 2T2I Timer 2 Interrupt. This bit is one when the corresponding latched status bit (T2L, register address Y26) is set, and the corresponding mask bit is unmasked (T2M, register address Y46). This bit is cleared when either this register, or the latched status register is read. 1T1I Timer 1 Interrupt. This bit is one when the corresponding latched status bit (T1L, register address Y26) is set, and the corresponding mask bit is unmasked (T1M, register address Y46). This bit is cleared when either this register, or the latched status register is read. 0 ONESECI One Second Timer Status Interrupt. This bit is one when the corresponding latched status bit (ONESECL, register address Y26) is set, and the corresponding mask bit is unmasked (ONESECM, register address Y46). This bit is cleared when either this register, or the latched status register is read. Bit Name Functional Description Table 180 - CAS, National, CRC-4 Local and Timer Interrupt Status Register (Address Y36) (E1) |
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